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authorMatt Arsenault <Matthew.Arsenault@amd.com>2016-12-06 01:02:51 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2016-12-06 01:02:51 +0000
commitad55ee58691b58f3ac36e688fc90808d5cf71e7f (patch)
tree712b24af2cc28eb96613647ee32d130ba02f8d03 /llvm/test/CodeGen/AMDGPU/basic-branch.ll
parent9642b36e91c28b888db018ebec8998b5bee33338 (diff)
downloadbcm5719-llvm-ad55ee58691b58f3ac36e688fc90808d5cf71e7f.tar.gz
bcm5719-llvm-ad55ee58691b58f3ac36e688fc90808d5cf71e7f.zip
AMDGPU: Don't required structured CFG
The structured CFG is just an aid to inserting exec mask modification instructions, once that is done we don't really need it anymore. We also do not analyze blocks with terminators that modify exec, so this should only be impacting true branches. llvm-svn: 288744
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/basic-branch.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/basic-branch.ll11
1 files changed, 7 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/basic-branch.ll b/llvm/test/CodeGen/AMDGPU/basic-branch.ll
index 83313ed5327..24874ee7fa9 100644
--- a/llvm/test/CodeGen/AMDGPU/basic-branch.ll
+++ b/llvm/test/CodeGen/AMDGPU/basic-branch.ll
@@ -8,13 +8,15 @@
; GCNNOOPT: v_writelane_b32
; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]]
+
; GCN: ; BB#1
; GCNNOOPT: v_readlane_b32
; GCNNOOPT: v_readlane_b32
; GCN: buffer_store_dword
-; GCN: s_endpgm
+; GCNOPT-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; TODO: This waitcnt can be eliminated
-; GCN: {{^}}[[END]]
+; GCN: {{^}}[[END]]:
; GCN: s_endpgm
define void @test_branch(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) #0 {
%cmp = icmp ne i32 %val, 0
@@ -35,9 +37,10 @@ end:
; GCN: s_cbranch_vccnz [[END:BB[0-9]+_[0-9]+]]
; GCN: buffer_store_dword
-; GCN: s_endpgm
+; GCNOPT-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; TODO: This waitcnt can be eliminated
-; GCN: {{^}}[[END]]
+; GCN: {{^}}[[END]]:
; GCN: s_endpgm
define void @test_brcc_i1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i1 %val) #0 {
%cmp0 = icmp ne i1 %val, 0
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