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author | Tom Stellard <thomas.stellard@amd.com> | 2015-06-13 03:28:10 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2015-06-13 03:28:10 +0000 |
commit | 45bb48ea197fe496865387120c7c55b56f0717d6 (patch) | |
tree | 3914fb8c4ace9ea4dee024fc944d51dc45adf401 /llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll | |
parent | 8fa9677d4eb1cd43973eb59acc12b0534691d604 (diff) | |
download | bcm5719-llvm-45bb48ea197fe496865387120c7c55b56f0717d6.tar.gz bcm5719-llvm-45bb48ea197fe496865387120c7c55b56f0717d6.zip |
R600 -> AMDGPU rename
llvm-svn: 239657
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll')
-rw-r--r-- | llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll b/llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll new file mode 100644 index 00000000000..4c6f45525b9 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll @@ -0,0 +1,39 @@ +; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s + +; FUNC-LABEL: {{^}}atomic_sub_local: +; R600: LDS_SUB * +; SI: ds_sub_u32 +define void @atomic_sub_local(i32 addrspace(3)* %local) { + %unused = atomicrmw volatile sub i32 addrspace(3)* %local, i32 5 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}atomic_sub_local_const_offset: +; R600: LDS_SUB * +; SI: ds_sub_u32 v{{[0-9]+}}, v{{[0-9]+}} offset:16 +define void @atomic_sub_local_const_offset(i32 addrspace(3)* %local) { + %gep = getelementptr i32, i32 addrspace(3)* %local, i32 4 + %val = atomicrmw volatile sub i32 addrspace(3)* %gep, i32 5 seq_cst + ret void +} + +; FUNC-LABEL: {{^}}atomic_sub_ret_local: +; R600: LDS_SUB_RET * +; SI: ds_sub_rtn_u32 +define void @atomic_sub_ret_local(i32 addrspace(1)* %out, i32 addrspace(3)* %local) { + %val = atomicrmw volatile sub i32 addrspace(3)* %local, i32 5 seq_cst + store i32 %val, i32 addrspace(1)* %out + ret void +} + +; FUNC-LABEL: {{^}}atomic_sub_ret_local_const_offset: +; R600: LDS_SUB_RET * +; SI: ds_sub_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20 +define void @atomic_sub_ret_local_const_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %local) { + %gep = getelementptr i32, i32 addrspace(3)* %local, i32 5 + %val = atomicrmw volatile sub i32 addrspace(3)* %gep, i32 5 seq_cst + store i32 %val, i32 addrspace(1)* %out + ret void +} |