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authorTim Renouf <tpr.llvm@botech.co.uk>2017-10-03 19:03:52 +0000
committerTim Renouf <tpr.llvm@botech.co.uk>2017-10-03 19:03:52 +0000
commit72800f0436e8420a96f54f48b187a58c161317db (patch)
tree4df7e409ed68a6c30a0493e15f8d6badd62b9f5c /llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
parent46513965842fc117f3afb0c8ee2fb0fd329d78ae (diff)
downloadbcm5719-llvm-72800f0436e8420a96f54f48b187a58c161317db.tar.gz
bcm5719-llvm-72800f0436e8420a96f54f48b187a58c161317db.zip
[AMDGPU] implemented pal metadata
Summary: For the amdpal OS type: We write an AMDGPU_PAL_METADATA record in the .note section in the ELF (or as an assembler directive). It contains key=value pairs of 32 bit ints. It is a merge of metadata from codegen of the shaders, and metadata provided by the frontend as _amdgpu_pal_metadata IR metadata. Where both sources have a key=value with the same key, the two values are ORed together. This .note record is part of the amdpal ABI and will be documented in docs/AMDGPUUsage.rst in a future commit. Eventually the amdpal OS type will stop generating the .AMDGPU.config section once the frontend has safely moved over to using the .note records above instead of .AMDGPU.config. Reviewers: arsenm, nhaehnle, dstuttard Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D37753 llvm-svn: 314829
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/amdpal-cs.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/amdpal-cs.ll5
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
index d722a4c2f38..a217478a154 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
@@ -2,10 +2,9 @@
; RUN: llc -mtriple=amdgcn--amdpal -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI -enable-var-scope %s
; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 -enable-var-scope %s
-; amdpal compute shader: check for 47176 (COMPUTE_PGM_RSRC1) in .AMDGPU.config
-; GCN-LABEL: .AMDGPU.config
-; GCN: .long 47176
+; amdpal compute shader: check for 0x2e12 (COMPUTE_PGM_RSRC1) in pal metadata
; GCN-LABEL: {{^}}cs_amdpal:
+; GCN: .amdgpu_pal_metadata{{.*}}0x2e12,
define amdgpu_cs half @cs_amdpal(half %arg0) {
%add = fadd half %arg0, 1.0
ret half %add
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