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authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2019-07-11 21:19:33 +0000
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2019-07-11 21:19:33 +0000
commite67cc380a800d91297bae9e82ea3357ff39e379d (patch)
treef5638751a2f622faef02c4a7533cc95fd82e8fef /llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
parent6bd26db06aae4fd27ea38f1aaac382005a079d29 (diff)
downloadbcm5719-llvm-e67cc380a800d91297bae9e82ea3357ff39e379d.tar.gz
bcm5719-llvm-e67cc380a800d91297bae9e82ea3357ff39e379d.zip
[AMDGPU] gfx908 mfma support
Differential Revision: https://reviews.llvm.org/D64584 llvm-svn: 365824
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/agpr-register-count.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/agpr-register-count.ll15
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/agpr-register-count.ll b/llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
new file mode 100644
index 00000000000..ab4fcc54f65
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
@@ -0,0 +1,15 @@
+; RUN: llc -march=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
+
+declare <32 x i32> @llvm.amdgcn.mfma.f32.32x32x1f32(float, float, <32 x i32>, i32, i32, i32)
+
+; GCN-LABEL: {{^}}test_32_agprs:
+; GCN: v_mfma_f32_32x32x1f32 a[0:31], {{v[0-9]+}}, {{v[0-9]+}}, 0
+; GCN-NOT: v28
+; GCN: NumVgprs: 32
+; GCN: VGPRBlocks: 7
+define amdgpu_kernel void @test_32_agprs(<32 x i32> addrspace(1)* %arg) {
+bb:
+ %mai.1 = tail call <32 x i32> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, i32 0, i32 0, i32 0)
+ store <32 x i32> %mai.1, <32 x i32> addrspace(1)* %arg
+ ret void
+}
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