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authorAlexander Timofeev <Alexander.Timofeev@amd.com>2017-07-03 14:54:11 +0000
committerAlexander Timofeev <Alexander.Timofeev@amd.com>2017-07-03 14:54:11 +0000
commitea7f08bee53c696f75adfc099b6c8e7b58b1ebe3 (patch)
treee6d6b05455101b83b74a58899c469db57b308ddf /llvm/test/CodeGen/AMDGPU/add_i128.ll
parent53d69e329b3b195b22afb565645031145966a2d8 (diff)
downloadbcm5719-llvm-ea7f08bee53c696f75adfc099b6c8e7b58b1ebe3.tar.gz
bcm5719-llvm-ea7f08bee53c696f75adfc099b6c8e7b58b1ebe3.zip
[AMDGPU] Switch scalarize global loads ON by default
Differential revision: https://reviews.llvm.org/D34407 llvm-svn: 307026
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/add_i128.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/add_i128.ll16
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/add_i128.ll b/llvm/test/CodeGen/AMDGPU/add_i128.ll
index 00a125c2e44..d33965d4dda 100644
--- a/llvm/test/CodeGen/AMDGPU/add_i128.ll
+++ b/llvm/test/CodeGen/AMDGPU/add_i128.ll
@@ -19,10 +19,10 @@ define amdgpu_kernel void @test_i128_vreg(i128 addrspace(1)* noalias %out, i128
; Check that the SGPR add operand is correctly moved to a VGPR.
; GCN-LABEL: {{^}}sgpr_operand:
-; GCN: v_add_i32
-; GCN: v_addc_u32
-; GCN: v_addc_u32
-; GCN: v_addc_u32
+; GCN: s_add_u32
+; GCN: s_addc_u32
+; GCN: s_addc_u32
+; GCN: s_addc_u32
define amdgpu_kernel void @sgpr_operand(i128 addrspace(1)* noalias %out, i128 addrspace(1)* noalias %in, i128 %a) {
%foo = load i128, i128 addrspace(1)* %in, align 8
%result = add i128 %foo, %a
@@ -31,10 +31,10 @@ define amdgpu_kernel void @sgpr_operand(i128 addrspace(1)* noalias %out, i128 ad
}
; GCN-LABEL: {{^}}sgpr_operand_reversed:
-; GCN: v_add_i32
-; GCN: v_addc_u32
-; GCN: v_addc_u32
-; GCN: v_addc_u32
+; GCN: s_add_u32
+; GCN: s_addc_u32
+; GCN: s_addc_u32
+; GCN: s_addc_u32
define amdgpu_kernel void @sgpr_operand_reversed(i128 addrspace(1)* noalias %out, i128 addrspace(1)* noalias %in, i128 %a) {
%foo = load i128, i128 addrspace(1)* %in, align 8
%result = add i128 %a, %foo
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