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author | Sander de Smalen <sander.desmalen@arm.com> | 2019-08-16 15:42:28 +0000 |
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committer | Sander de Smalen <sander.desmalen@arm.com> | 2019-08-16 15:42:28 +0000 |
commit | f28e1128d9efb7c26adb50a1521db181a1b76f09 (patch) | |
tree | b5df364a76cf1e677aeda75fb2e701ce0be97041 /llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll | |
parent | 2d3ebeb81395644902c8d69cce3ec19e404d840a (diff) | |
download | bcm5719-llvm-f28e1128d9efb7c26adb50a1521db181a1b76f09.tar.gz bcm5719-llvm-f28e1128d9efb7c26adb50a1521db181a1b76f09.zip |
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
Changes:
There was a condition for `!NeedsFrameRecord` missing in the assert. The
assert in question has changed to:
+ assert((!RPI.isPaired() || !NeedsFrameRecord || RPI.Reg2 != AArch64::FP ||
+ RPI.Reg1 == AArch64::LR) &&
+ "FrameRecord must be allocated together with LR");
This addresses PR43016.
llvm-svn: 369122
Diffstat (limited to 'llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll')
-rw-r--r-- | llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll index fc4f7ebb234..23f2206c71f 100644 --- a/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll +++ b/llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll @@ -197,16 +197,16 @@ declare void @use32(i32) nounwind define i32 @in_multiuse_A_constmask(i32 %x, i32 %y, i32 %z) nounwind { ; CHECK-LABEL: in_multiuse_A_constmask: ; CHECK: // %bb.0: -; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill +; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill ; CHECK-NEXT: eor w8, w0, w1 +; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill ; CHECK-NEXT: and w20, w8, #0xffff ; CHECK-NEXT: mov w0, w20 -; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill ; CHECK-NEXT: mov w19, w1 ; CHECK-NEXT: bl use32 ; CHECK-NEXT: eor w0, w20, w19 -; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload -; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload +; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload +; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload ; CHECK-NEXT: ret %n0 = xor i32 %x, %y %n1 = and i32 %n0, 65535 @@ -218,15 +218,15 @@ define i32 @in_multiuse_A_constmask(i32 %x, i32 %y, i32 %z) nounwind { define i32 @in_multiuse_B_constmask(i32 %x, i32 %y, i32 %z) nounwind { ; CHECK-LABEL: in_multiuse_B_constmask: ; CHECK: // %bb.0: -; CHECK-NEXT: str x20, [sp, #-32]! // 8-byte Folded Spill +; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill ; CHECK-NEXT: eor w0, w0, w1 -; CHECK-NEXT: stp x19, x30, [sp, #16] // 16-byte Folded Spill +; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill ; CHECK-NEXT: mov w19, w1 ; CHECK-NEXT: and w20, w0, #0xffff ; CHECK-NEXT: bl use32 ; CHECK-NEXT: eor w0, w20, w19 -; CHECK-NEXT: ldp x19, x30, [sp, #16] // 16-byte Folded Reload -; CHECK-NEXT: ldr x20, [sp], #32 // 8-byte Folded Reload +; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload +; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload ; CHECK-NEXT: ret %n0 = xor i32 %x, %y %n1 = and i32 %n0, 65535 |