diff options
| author | Fangrui Song <maskray@google.com> | 2020-01-20 14:57:11 -0800 |
|---|---|---|
| committer | Fangrui Song <maskray@google.com> | 2020-01-24 10:38:40 -0800 |
| commit | bf04730dee1b74c8e7661c671484eff93c1f5a77 (patch) | |
| tree | 2a780731504023d8075ca85e50e5f582ffd930c6 /llvm/test/CodeGen/AArch64/patchable-function-entry.ll | |
| parent | 0e2eea29cc4f360fc95638fbfc8aca24cec3fc5f (diff) | |
| download | bcm5719-llvm-bf04730dee1b74c8e7661c671484eff93c1f5a77.tar.gz bcm5719-llvm-bf04730dee1b74c8e7661c671484eff93c1f5a77.zip | |
Add function attribute "patchable-function-prefix" to support -fpatchable-function-entry=N,M where M>0
Similar to the function attribute `prefix` (prefix data),
"patchable-function-prefix" inserts data (M NOPs) before the function
entry label.
-fpatchable-function-entry=2,1 (1 NOP before entry, 1 NOP after entry)
will look like:
```
.type foo,@function
.Ltmp0: # @foo
nop
foo:
.Lfunc_begin0:
# optional `bti c` (AArch64 Branch Target Identification) or
# `endbr64` (Intel Indirect Branch Tracking)
nop
.section __patchable_function_entries,"awo",@progbits,get,unique,0
.p2align 3
.quad .Ltmp0
```
-fpatchable-function-entry=N,0 + -mbranch-protection=bti/-fcf-protection=branch has two reasonable
placements (https://gcc.gnu.org/ml/gcc-patches/2020-01/msg01185.html):
```
(a) (b)
func: func:
.Ltmp0: bti c
bti c .Ltmp0:
nop nop
```
(a) needs no additional code. If the consensus is to go for (b), we will
need more code in AArch64BranchTargets.cpp / X86IndirectBranchTracking.cpp .
Differential Revision: https://reviews.llvm.org/D73070
(cherry picked from commit 22467e259507f5ead2a87d989251b4c951a587e4)
Diffstat (limited to 'llvm/test/CodeGen/AArch64/patchable-function-entry.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/patchable-function-entry.ll | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/patchable-function-entry.ll b/llvm/test/CodeGen/AArch64/patchable-function-entry.ll index 6d84f23ba5e..5ae9d88a289 100644 --- a/llvm/test/CodeGen/AArch64/patchable-function-entry.ll +++ b/llvm/test/CodeGen/AArch64/patchable-function-entry.ll @@ -25,6 +25,10 @@ define i32 @f1() "patchable-function-entry"="1" { ret i32 0 } +;; Without -function-sections, f2 is in the same text section as f1. +;; They share the __patchable_function_entries section. +;; With -function-sections, f1 and f2 are in different text sections. +;; Use separate __patchable_function_entries. define void @f2() "patchable-function-entry"="2" { ; CHECK-LABEL: f2: ; CHECK-NEXT: .Lfunc_begin2: @@ -63,3 +67,39 @@ define void @f5() "patchable-function-entry"="5" comdat { %frame = alloca i8, i32 16 ret void } + +;; -fpatchable-function-entry=3,2 +;; "patchable-function-prefix" emits data before the function entry label. +define void @f3_2() "patchable-function-entry"="1" "patchable-function-prefix"="2" { +; CHECK-LABEL: .type f3_2,@function +; CHECK-NEXT: .Ltmp1: // @f3_2 +; CHECK-NEXT: nop +; CHECK-NEXT: nop +; CHECK-NEXT: f3_2: +; CHECK: // %bb.0: +; CHECK-NEXT: nop +; CHECK-NEXT: ret +;; .size does not include the prefix. +; CHECK: .Lfunc_end5: +; CHECK-NEXT: .size f3_2, .Lfunc_end5-f3_2 +; NOFSECT .section __patchable_function_entries,"awo",@progbits,f1,unique,0 +; FSECT: .section __patchable_function_entries,"awo",@progbits,f3_2,unique,4 +; CHECK: .p2align 3 +; CHECK-NEXT: .xword .Ltmp1 + ret void +} + +;; When prefix data is used, arbitrarily place NOPs after prefix data. +define void @prefix() "patchable-function-entry"="0" "patchable-function-prefix"="1" prefix i32 1 { +; CHECK-LABEL: .type prefix,@function +; CHECK-NEXT: .word 1 // @prefix +; CHECK: .Ltmp2: +; CHECK: nop +; CHECK-NEXT: prefix: +;; Emit a __patchable_function_entries entry even if "patchable-function-entry" is 0. +; NOFSECT .section __patchable_function_entries,"awo",@progbits,prefix,unique,0 +; FSECT: .section __patchable_function_entries,"awo",@progbits,prefix,unique,5 +; CHECK: .p2align 3 +; CHECK-NEXT: .xword .Ltmp2 + ret void +} |

