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| author | Tim Northover <tnorthover@apple.com> | 2014-05-15 12:11:02 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-05-15 12:11:02 +0000 |
| commit | 2509a3fc640587d7de5e75ef5e2088637264b9f0 (patch) | |
| tree | 0fb1812e13096374b9b7bacc9aae585831c03160 /llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll | |
| parent | a357badc582bdc7c6cb091e1a1c9575dc00471e4 (diff) | |
| download | bcm5719-llvm-2509a3fc640587d7de5e75ef5e2088637264b9f0.tar.gz bcm5719-llvm-2509a3fc640587d7de5e75ef5e2088637264b9f0.zip | |
ARM64: print correct aliases for NEON mov & mvn instructions
In all cases, if a "mov" alias exists, it is the canonical form of the
instruction. Now that TableGen can support aliases containing syntax variants,
we can enable them and improve the quality of the asm output.
llvm-svn: 208874
Diffstat (limited to 'llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll b/llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll index d8f7cc45d16..228a6bfdf5d 100644 --- a/llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll +++ b/llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll @@ -661,7 +661,7 @@ define <4 x i16> @vselect_v4i16(<4 x i16> %a) { define <8 x i8> @vselect_cmp_ne(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) { ; CHECK-LABEL: vselect_cmp_ne: ; CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b -; CHECK-NEXT: not {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK-NEXT: {{mvn|not}} {{v[0-9]+}}.8b, {{v[0-9]+}}.8b ; CHECK-NEXT: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b %cmp = icmp ne <8 x i8> %a, %b %d = select <8 x i1> %cmp, <8 x i8> %b, <8 x i8> %c @@ -680,7 +680,7 @@ define <8 x i8> @vselect_cmp_eq(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) { define <8 x i8> @vselect_cmpz_ne(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) { ; CHECK-LABEL: vselect_cmpz_ne: ; CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0 -; CHECK-NEXT: not {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK-NEXT: {{mvn|not}} {{v[0-9]+}}.8b, {{v[0-9]+}}.8b ; CHECK-NEXT: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b %cmp = icmp ne <8 x i8> %a, zeroinitializer %d = select <8 x i1> %cmp, <8 x i8> %b, <8 x i8> %c |
