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| author | Florian Hahn <florian.hahn@arm.com> | 2018-01-31 13:54:30 +0000 |
|---|---|---|
| committer | Florian Hahn <florian.hahn@arm.com> | 2018-01-31 13:54:30 +0000 |
| commit | c68428b5dc47fddcb6b0af50bfac9f9827832a6c (patch) | |
| tree | 450749e735df7b51d59e74d300ae97f966271d71 /llvm/test/CodeGen/AArch64/machine-combiner.ll | |
| parent | d1a7a37c22c9a716818f76c7edd1a657bda0f441 (diff) | |
| download | bcm5719-llvm-c68428b5dc47fddcb6b0af50bfac9f9827832a6c.tar.gz bcm5719-llvm-c68428b5dc47fddcb6b0af50bfac9f9827832a6c.zip | |
[MachineCombiner] Add check for optimal pattern order.
In D41587, @mssimpso discovered that the order of some patterns for
AArch64 was sub-optimal. I thought a bit about how we could avoid that
case in the future. I do not think there is a need for evaluating all
patterns for now. But this patch adds an extra (expensive) check, that
evaluates the latencies of all patterns, and ensures that the latency
saved decreases for subsequent patterns.
This catches the sub-optimal order fixed in D41587, but I am not
entirely happy with the check, as it only applies to sub-optimal
patterns seen while building with EXPENSIVE_CHECKS on. It did not
discover any other sub-optimal pattern ordering.
Reviewers: Gerolf, spatel, mssimpso
Reviewed By: Gerolf, mssimpso
Differential Revision: https://reviews.llvm.org/D41766
llvm-svn: 323873
Diffstat (limited to 'llvm/test/CodeGen/AArch64/machine-combiner.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/machine-combiner.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AArch64/machine-combiner.ll b/llvm/test/CodeGen/AArch64/machine-combiner.ll index 358315d088d..b07788fbeef 100644 --- a/llvm/test/CodeGen/AArch64/machine-combiner.ll +++ b/llvm/test/CodeGen/AArch64/machine-combiner.ll @@ -3,7 +3,7 @@ ; Incremental updates of the instruction depths should be enough for this test ; case. ; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=cortex-a57 -enable-unsafe-fp-math \ -; RUN: -disable-post-ra -machine-combiner-inc-threshold=0 < %s | FileCheck %s +; RUN: -disable-post-ra -machine-combiner-inc-threshold=0 -machine-combiner-verify-pattern-order=true < %s | FileCheck %s ; Verify that the first two adds are independent regardless of how the inputs are ; commuted. The destination registers are used as source registers for the third add. |
