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| author | Artur Pilipenko <apilipenko@azulsystems.com> | 2017-02-16 13:04:46 +0000 |
|---|---|---|
| committer | Artur Pilipenko <apilipenko@azulsystems.com> | 2017-02-16 13:04:46 +0000 |
| commit | a1b384c4ceffb1e3d5a08bb2ce1222eebf7bf8b3 (patch) | |
| tree | 6d884299c1e6637fed68ca8b7aaae5d30a2a053d /llvm/test/CodeGen/AArch64/load-combine.ll | |
| parent | daaa0c0f7d405b4ebd515dc50aa0d0ebe4ee75ff (diff) | |
| download | bcm5719-llvm-a1b384c4ceffb1e3d5a08bb2ce1222eebf7bf8b3.tar.gz bcm5719-llvm-a1b384c4ceffb1e3d5a08bb2ce1222eebf7bf8b3.zip | |
Rever -r295314 "[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine"
This change causes some of AMDGPU and PowerPC tests to fail.
llvm-svn: 295316
Diffstat (limited to 'llvm/test/CodeGen/AArch64/load-combine.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/load-combine.ll | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AArch64/load-combine.ll b/llvm/test/CodeGen/AArch64/load-combine.ll index f0ed40357f1..59622fc3e0a 100644 --- a/llvm/test/CodeGen/AArch64/load-combine.ll +++ b/llvm/test/CodeGen/AArch64/load-combine.ll @@ -324,8 +324,12 @@ define i32 @load_i32_by_bswap_i16(i32* %arg) { ; (i32) p[0] | (sext(p[1] << 16) to i32) define i32 @load_i32_by_sext_i16(i32* %arg) { ; CHECK-LABEL: load_i32_by_sext_i16: -; CHECK: ldr w0, [x0] +; CHECK: ldrh w8, [x0] +; CHECK-NEXT: ldrh w9, [x0, #2] +; CHECK-NEXT: bfi w8, w9, #16, #16 +; CHECK-NEXT: mov w0, w8 ; CHECK-NEXT: ret + %tmp = bitcast i32* %arg to i16* %tmp1 = load i16, i16* %tmp, align 4 %tmp2 = zext i16 %tmp1 to i32 @@ -382,6 +386,7 @@ define i32 @load_i32_by_i8_base_offset_index_2(i8* %arg, i32 %i) { ; CHECK: add x8, x0, w1, uxtw ; CHECK-NEXT: ldur w0, [x8, #13] ; CHECK-NEXT: ret + %tmp = add nuw nsw i32 %i, 4 %tmp2 = add nuw nsw i32 %i, 3 %tmp3 = add nuw nsw i32 %i, 2 |
