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| author | John Brawn <john.brawn@arm.com> | 2020-01-27 15:51:06 +0000 |
|---|---|---|
| committer | Hans Wennborg <hans@chromium.org> | 2020-02-18 16:46:40 +0100 |
| commit | fca6c5e5dbf283b9e96b4a6ba8d343ff5dd91328 (patch) | |
| tree | 7072a8dd213fdff5da91a6eaef4b0ea42bcdedb3 /llvm/test/CodeGen/AArch64/fpconv-vector-op-scalarize-strict.ll | |
| parent | a97c77ad17502cc634473dc5ad433905f5d80b2f (diff) | |
| download | bcm5719-llvm-fca6c5e5dbf283b9e96b4a6ba8d343ff5dd91328.tar.gz bcm5719-llvm-fca6c5e5dbf283b9e96b4a6ba8d343ff5dd91328.zip | |
[FPEnv][AArch64] Add lowering and instruction selection for strict conversions
Strict fp-to-int and int-to-fp conversions can be handled in the same way that
the non-strict versions are (by using the appropriate instruction or converting
to a function call when we have no instruction).
Differential Revision: https://reviews.llvm.org/D73625
(cherry picked from commit 0bb9a27c9895c0fbc3f55f56ad7f1e1927398fce)
Diffstat (limited to 'llvm/test/CodeGen/AArch64/fpconv-vector-op-scalarize-strict.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/fpconv-vector-op-scalarize-strict.ll | 22 |
1 files changed, 2 insertions, 20 deletions
diff --git a/llvm/test/CodeGen/AArch64/fpconv-vector-op-scalarize-strict.ll b/llvm/test/CodeGen/AArch64/fpconv-vector-op-scalarize-strict.ll index 30ab3bd1077..eba7fa88dc5 100644 --- a/llvm/test/CodeGen/AArch64/fpconv-vector-op-scalarize-strict.ll +++ b/llvm/test/CodeGen/AArch64/fpconv-vector-op-scalarize-strict.ll @@ -8,18 +8,8 @@ define <1 x double> @test_sitofp(<1 x i1> %in) #0 { ; CHECK-LABEL: test_sitofp: ; CHECK: ; %bb.0: ; %entry -; CHECK-NEXT: sub sp, sp, #16 ; =16 -; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: sbfx w8, w0, #0, #1 -; CHECK-NEXT: mov w9, #1127219200 -; CHECK-NEXT: eor w8, w8, #0x80000000 -; CHECK-NEXT: stp w8, w9, [sp, #8] -; CHECK-NEXT: ldr d0, [sp, #8] -; CHECK-NEXT: mov x8, #2147483648 -; CHECK-NEXT: movk x8, #17200, lsl #48 -; CHECK-NEXT: fmov d1, x8 -; CHECK-NEXT: fsub d0, d0, d1 -; CHECK-NEXT: add sp, sp, #16 ; =16 +; CHECK-NEXT: scvtf d0, w8 ; CHECK-NEXT: ret entry: %0 = call <1 x double> @llvm.experimental.constrained.sitofp.v1f64.v1i1(<1 x i1> %in, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 @@ -29,16 +19,8 @@ entry: define <1 x double> @test_uitofp(<1 x i1> %in) #0 { ; CHECK-LABEL: test_uitofp: ; CHECK: ; %bb.0: ; %entry -; CHECK-NEXT: sub sp, sp, #16 ; =16 -; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: and w8, w0, #0x1 -; CHECK-NEXT: mov w9, #1127219200 -; CHECK-NEXT: stp w8, w9, [sp, #8] -; CHECK-NEXT: ldr d0, [sp, #8] -; CHECK-NEXT: mov x8, #4841369599423283200 -; CHECK-NEXT: fmov d1, x8 -; CHECK-NEXT: fsub d0, d0, d1 -; CHECK-NEXT: add sp, sp, #16 ; =16 +; CHECK-NEXT: ucvtf d0, w8 ; CHECK-NEXT: ret entry: %0 = call <1 x double> @llvm.experimental.constrained.uitofp.v1f64.v1i1(<1 x i1> %in, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 |
