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| author | Juergen Ributzka <juergen@apple.com> | 2014-08-21 20:57:57 +0000 |
|---|---|---|
| committer | Juergen Ributzka <juergen@apple.com> | 2014-08-21 20:57:57 +0000 |
| commit | addb75a4f32ce093a4939f4253a99deecdd1666f (patch) | |
| tree | c859e4816066c273b3f2bf3da4d7fdde903b72df /llvm/test/CodeGen/AArch64/fast-isel-mul.ll | |
| parent | 3b717527f4e41337e90ef47f743543f25cb4949c (diff) | |
| download | bcm5719-llvm-addb75a4f32ce093a4939f4253a99deecdd1666f.tar.gz bcm5719-llvm-addb75a4f32ce093a4939f4253a99deecdd1666f.zip | |
[FastISel][AArch64] Use the correct register class to make the MI verifier happy.
This is mostly achieved by providing the correct register class manually,
because getRegClassFor always returns the GPR*AllRegClass for MVT::i32 and
MVT::i64.
Also cleanup the code to use the FastEmitInst_* method whenever possible. This
makes sure that the operands' register class is properly constrained. For all
the remaining cases this adds the missing constrainOperandRegClass calls for
each operand.
llvm-svn: 216225
Diffstat (limited to 'llvm/test/CodeGen/AArch64/fast-isel-mul.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/fast-isel-mul.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-mul.ll b/llvm/test/CodeGen/AArch64/fast-isel-mul.ll index d02c67f52f8..88a3ee8db3d 100644 --- a/llvm/test/CodeGen/AArch64/fast-isel-mul.ll +++ b/llvm/test/CodeGen/AArch64/fast-isel-mul.ll @@ -1,4 +1,4 @@ -; RUN: llc -fast-isel -fast-isel-abort -mtriple=aarch64 -o - %s | FileCheck %s +; RUN: llc -fast-isel -fast-isel-abort -verify-machineinstrs -mtriple=aarch64 < %s | FileCheck %s @var8 = global i8 0 @var16 = global i16 0 @@ -7,7 +7,7 @@ define void @test_mul8(i8 %lhs, i8 %rhs) { ; CHECK-LABEL: test_mul8: -; CHECK: mul w0, w0, w1 +; CHECK: mul {{w[0-9]+}}, w0, w1 ; %lhs = load i8* @var8 ; %rhs = load i8* @var8 %prod = mul i8 %lhs, %rhs @@ -17,7 +17,7 @@ define void @test_mul8(i8 %lhs, i8 %rhs) { define void @test_mul16(i16 %lhs, i16 %rhs) { ; CHECK-LABEL: test_mul16: -; CHECK: mul w0, w0, w1 +; CHECK: mul {{w[0-9]+}}, w0, w1 %prod = mul i16 %lhs, %rhs store i16 %prod, i16* @var16 ret void @@ -25,7 +25,7 @@ define void @test_mul16(i16 %lhs, i16 %rhs) { define void @test_mul32(i32 %lhs, i32 %rhs) { ; CHECK-LABEL: test_mul32: -; CHECK: mul w0, w0, w1 +; CHECK: mul {{w[0-9]+}}, w0, w1 %prod = mul i32 %lhs, %rhs store i32 %prod, i32* @var32 ret void @@ -33,7 +33,7 @@ define void @test_mul32(i32 %lhs, i32 %rhs) { define void @test_mul64(i64 %lhs, i64 %rhs) { ; CHECK-LABEL: test_mul64: -; CHECK: mul x0, x0, x1 +; CHECK: mul {{x[0-9]+}}, x0, x1 %prod = mul i64 %lhs, %rhs store i64 %prod, i64* @var64 ret void |
