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| author | Juergen Ributzka <juergen@apple.com> | 2014-09-18 07:04:49 +0000 |
|---|---|---|
| committer | Juergen Ributzka <juergen@apple.com> | 2014-09-18 07:04:49 +0000 |
| commit | 2fc851002b34f6b30e947f82611f4331cd38c93d (patch) | |
| tree | 14da79825954b0926d0150651bda69b008aa35f1 /llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll | |
| parent | a33070c3218a91925e98b62b976830c1c4bafc53 (diff) | |
| download | bcm5719-llvm-2fc851002b34f6b30e947f82611f4331cd38c93d.tar.gz bcm5719-llvm-2fc851002b34f6b30e947f82611f4331cd38c93d.zip | |
[FastISel][AArch64] Followup commit for 218031 to handle negative offsets too.
llvm-svn: 218032
Diffstat (limited to 'llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll b/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll index 88a845821f2..e562a5dba05 100644 --- a/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll +++ b/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll @@ -130,12 +130,9 @@ define i32 @load_breg_immoff_1(i64 %a) { ; Min not-supported negative offset define i32 @load_breg_immoff_2(i64 %a) { -; SDAG-LABEL: load_breg_immoff_2 -; SDAG: sub [[REG:x[0-9]+]], x0, #257 -; SDAG-NEXT: ldr {{w[0-9]+}}, {{\[}}[[REG]]{{\]}} -; FAST-LABEL: load_breg_immoff_2 -; FAST: add [[REG:x[0-9]+]], x0, {{x[0-9]+}} -; FAST-NEXT: ldr {{w[0-9]+}}, {{\[}}[[REG]]{{\]}} +; CHECK-LABEL: load_breg_immoff_2 +; CHECK: sub [[REG:x[0-9]+]], x0, #257 +; CHECK-NEXT: ldr {{w[0-9]+}}, {{\[}}[[REG]]{{\]}} %1 = add i64 %a, -257 %2 = inttoptr i64 %1 to i32* %3 = load i32* %2 @@ -196,12 +193,9 @@ define void @store_breg_immoff_1(i64 %a) { ; Min not-supported negative offset define void @store_breg_immoff_2(i64 %a) { -; SDAG-LABEL: store_breg_immoff_2 -; SDAG: sub [[REG:x[0-9]+]], x0, #257 -; SDAG-NEXT: str wzr, {{\[}}[[REG]]{{\]}} -; FAST-LABEL: store_breg_immoff_2 -; FAST: add [[REG:x[0-9]+]], x0, {{x[0-9]+}} -; FAST-NEXT: str wzr, {{\[}}[[REG]]{{\]}} +; CHECK-LABEL: store_breg_immoff_2 +; CHECK: sub [[REG:x[0-9]+]], x0, #257 +; CHECK-NEXT: str wzr, {{\[}}[[REG]]{{\]}} %1 = add i64 %a, -257 %2 = inttoptr i64 %1 to i32* store i32 0, i32* %2 |
