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| author | Tim Northover <tnorthover@apple.com> | 2014-05-24 12:42:26 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-05-24 12:42:26 +0000 |
| commit | cc08e1fe1b3feef12a1eba31f8afcc3bbefc733e (patch) | |
| tree | 944d86a337d00e62dbc49d2ff0aad7925472afa7 /llvm/test/CodeGen/AArch64/extern-weak.ll | |
| parent | f6ee78cfb7869dba4f797cbc0573bf02beac7810 (diff) | |
| download | bcm5719-llvm-cc08e1fe1b3feef12a1eba31f8afcc3bbefc733e.tar.gz bcm5719-llvm-cc08e1fe1b3feef12a1eba31f8afcc3bbefc733e.zip | |
AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.
I'm doing this in two phases for a better "git blame" record. This
commit removes the previous AArch64 backend and redirects all
functionality to ARM64. It also deduplicates test-lines and removes
orphaned AArch64 tests.
The next step will be "git mv ARM64 AArch64" and rewire most of the
tests.
Hopefully LLVM is still functional, though it would be even better if
no-one ever had to care because the rename happens straight
afterwards.
llvm-svn: 209576
Diffstat (limited to 'llvm/test/CodeGen/AArch64/extern-weak.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/extern-weak.ll | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/AArch64/extern-weak.ll b/llvm/test/CodeGen/AArch64/extern-weak.ll index 7c78f9a815e..8f418455ffa 100644 --- a/llvm/test/CodeGen/AArch64/extern-weak.ll +++ b/llvm/test/CodeGen/AArch64/extern-weak.ll @@ -1,5 +1,3 @@ -; RUN: llc -mtriple=aarch64-none-linux-gnu -o - < %s | FileCheck %s --check-prefix=CHECK-AARCH64 -; RUN: llc -mtriple=aarch64-none-linux-gnu -code-model=large -o - < %s | FileCheck --check-prefix=CHECK-LARGE %s ; RUN: llc -mtriple=arm64-none-linux-gnu -o - %s | FileCheck %s --check-prefix=CHECK-ARM64 ; RUN: llc -mtriple=arm64-none-linux-gnu -code-model=large -o - %s | FileCheck --check-prefix=CHECK-LARGE %s @@ -9,10 +7,7 @@ define i32()* @foo() { ; The usual ADRP/ADD pair can't be used for a weak reference because it must ; evaluate to 0 if the symbol is undefined. We use a litpool entry. ret i32()* @var -; CHECK-AARCH64: .LCPI0_0: -; CHECK-AARCH64-NEXT: .xword var -; CHECK-AARCH64: ldr x0, [{{x[0-9]+}}, #:lo12:.LCPI0_0] ; CHECK-ARM64: adrp x[[ADDRHI:[0-9]+]], :got:var ; CHECK-ARM64: ldr x0, [x[[ADDRHI]], :got_lo12:var] @@ -30,11 +25,7 @@ define i32()* @foo() { define i32* @bar() { %addr = getelementptr [10 x i32]* @arr_var, i32 0, i32 5 -; CHECK-AARCH64: .LCPI1_0: -; CHECK-AARCH64-NEXT: .xword arr_var -; CHECK-AARCH64: ldr [[BASE:x[0-9]+]], [{{x[0-9]+}}, #:lo12:.LCPI1_0] -; CHECK-AARCH64: add x0, [[BASE]], #20 ; CHECK-ARM64: adrp x[[ADDRHI:[0-9]+]], :got:arr_var ; CHECK-ARM64: ldr [[BASE:x[0-9]+]], [x[[ADDRHI]], :got_lo12:arr_var] @@ -54,8 +45,6 @@ define i32* @bar() { define i32* @wibble() { ret i32* @defined_weak_var -; CHECK-AARCH64: adrp [[BASE:x[0-9]+]], defined_weak_var -; CHECK-AARCH64: add x0, [[BASE]], #:lo12:defined_weak_var ; CHECK-ARM64: adrp [[BASE:x[0-9]+]], defined_weak_var ; CHECK-ARM64: add x0, [[BASE]], :lo12:defined_weak_var |
