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| author | David Green <david.green@arm.com> | 2018-08-30 11:55:16 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2018-08-30 11:55:16 +0000 |
| commit | 1f203bcd750408d2df42adebe54ec276d81f5f0d (patch) | |
| tree | 01c6ebc8e56149a2957062ea841eb35f2a02c570 /llvm/test/CodeGen/AArch64/code-model-tiny-abs.ll | |
| parent | 38bdac5db854d298013388cd6887f49f56d10ffe (diff) | |
| download | bcm5719-llvm-1f203bcd750408d2df42adebe54ec276d81f5f0d.tar.gz bcm5719-llvm-1f203bcd750408d2df42adebe54ec276d81f5f0d.zip | |
[AArch64] Optimise load(adr address) to ldr address
Providing that the load is known to be 4 byte aligned, we can optimise a
ldr(adr address) to just ldr address.
Differential Revision: https://reviews.llvm.org/D51030
llvm-svn: 341058
Diffstat (limited to 'llvm/test/CodeGen/AArch64/code-model-tiny-abs.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/code-model-tiny-abs.ll | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AArch64/code-model-tiny-abs.ll b/llvm/test/CodeGen/AArch64/code-model-tiny-abs.ll index bd09cf74a58..e8e802fa24b 100644 --- a/llvm/test/CodeGen/AArch64/code-model-tiny-abs.ll +++ b/llvm/test/CodeGen/AArch64/code-model-tiny-abs.ll @@ -33,16 +33,14 @@ define i32 @global_i32() { ; CHECK-LABEL: global_i32: %val = load i32, i32* @var32 ret i32 %val -; CHECK: adr x[[ADDR_REG:[0-9]+]], var32 -; CHECK: ldr w0, [x[[ADDR_REG]]] +; CHECK: ldr w0, var32 } define i64 @global_i64() { ; CHECK-LABEL: global_i64: %val = load i64, i64* @var64 ret i64 %val -; CHECK: adr x[[ADDR_REG:[0-9]+]], var64 -; CHECK: ldr x0, [x[[ADDR_REG]]] +; CHECK: ldr x0, var64 } define <2 x i64> @constpool() { |
