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author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
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committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/CodeGen/AArch64/code-model-large-abs.ll | |
parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/CodeGen/AArch64/code-model-large-abs.ll')
-rw-r--r-- | llvm/test/CodeGen/AArch64/code-model-large-abs.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AArch64/code-model-large-abs.ll b/llvm/test/CodeGen/AArch64/code-model-large-abs.ll index ca92500855b..1680815d93e 100644 --- a/llvm/test/CodeGen/AArch64/code-model-large-abs.ll +++ b/llvm/test/CodeGen/AArch64/code-model-large-abs.ll @@ -18,7 +18,7 @@ define i8* @global_addr() { define i8 @global_i8() { ; CHECK-LABEL: global_i8: - %val = load i8* @var8 + %val = load i8, i8* @var8 ret i8 %val ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var8 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var8 @@ -29,7 +29,7 @@ define i8 @global_i8() { define i16 @global_i16() { ; CHECK-LABEL: global_i16: - %val = load i16* @var16 + %val = load i16, i16* @var16 ret i16 %val ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var16 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var16 @@ -40,7 +40,7 @@ define i16 @global_i16() { define i32 @global_i32() { ; CHECK-LABEL: global_i32: - %val = load i32* @var32 + %val = load i32, i32* @var32 ret i32 %val ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var32 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var32 @@ -51,7 +51,7 @@ define i32 @global_i32() { define i64 @global_i64() { ; CHECK-LABEL: global_i64: - %val = load i64* @var64 + %val = load i64, i64* @var64 ret i64 %val ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var64 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var64 |