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| author | Tim Northover <tnorthover@apple.com> | 2014-05-24 12:42:26 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-05-24 12:42:26 +0000 |
| commit | cc08e1fe1b3feef12a1eba31f8afcc3bbefc733e (patch) | |
| tree | 944d86a337d00e62dbc49d2ff0aad7925472afa7 /llvm/test/CodeGen/AArch64/bitfield.ll | |
| parent | f6ee78cfb7869dba4f797cbc0573bf02beac7810 (diff) | |
| download | bcm5719-llvm-cc08e1fe1b3feef12a1eba31f8afcc3bbefc733e.tar.gz bcm5719-llvm-cc08e1fe1b3feef12a1eba31f8afcc3bbefc733e.zip | |
AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.
I'm doing this in two phases for a better "git blame" record. This
commit removes the previous AArch64 backend and redirects all
functionality to ARM64. It also deduplicates test-lines and removes
orphaned AArch64 tests.
The next step will be "git mv ARM64 AArch64" and rewire most of the
tests.
Hopefully LLVM is still functional, though it would be even better if
no-one ever had to care because the rename happens straight
afterwards.
llvm-svn: 209576
Diffstat (limited to 'llvm/test/CodeGen/AArch64/bitfield.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/bitfield.ll | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AArch64/bitfield.ll b/llvm/test/CodeGen/AArch64/bitfield.ll index 92f6d74908b..71ffe30c928 100644 --- a/llvm/test/CodeGen/AArch64/bitfield.ll +++ b/llvm/test/CodeGen/AArch64/bitfield.ll @@ -1,4 +1,3 @@ -; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64 ; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-none-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64 @var32 = global i32 0 @@ -24,7 +23,6 @@ define void @test_extendb(i8 %var) { %uxt64 = zext i8 %var to i64 store volatile i64 %uxt64, i64* @var64 -; CHECK-AARCH64: uxtb {{x[0-9]+}}, {{w[0-9]+}} ; CHECK-ARM64: and {{x[0-9]+}}, {{x[0-9]+}}, #0xff ret void } @@ -49,7 +47,6 @@ define void @test_extendh(i16 %var) { %uxt64 = zext i16 %var to i64 store volatile i64 %uxt64, i64* @var64 -; CHECK-AARCH64: uxth {{x[0-9]+}}, {{w[0-9]+}} ; CHECK-ARM64: and {{x[0-9]+}}, {{x[0-9]+}}, #0xffff ret void } @@ -63,7 +60,6 @@ define void @test_extendw(i32 %var) { %uxt64 = zext i32 %var to i64 store volatile i64 %uxt64, i64* @var64 -; CHECK-AARCH64: ubfx {{w[0-9]+}}, {{w[0-9]+}}, #0, #32 ; CHECK-ARM64: ubfx {{x[0-9]+}}, {{x[0-9]+}}, #0, #32 ret void } |
