diff options
| author | Eli Friedman <efriedma@codeaurora.org> | 2018-05-24 19:38:23 +0000 |
|---|---|---|
| committer | Eli Friedman <efriedma@codeaurora.org> | 2018-05-24 19:38:23 +0000 |
| commit | 9e177882aa41490ce94d57b593f50d6c925d6b4b (patch) | |
| tree | 2af5e365b96fe1924f2a869c247a9a14f8a7aa60 /llvm/test/CodeGen/AArch64/arm64-variadic-aapcs.ll | |
| parent | 7d60b9052a4a5d7d6e2baef09ac790a88c5e2214 (diff) | |
| download | bcm5719-llvm-9e177882aa41490ce94d57b593f50d6c925d6b4b.tar.gz bcm5719-llvm-9e177882aa41490ce94d57b593f50d6c925d6b4b.zip | |
[AArch64] Improve orr+movk sequences for MOVi64imm.
The existing code has three different ways to try to lower a 64-bit
immediate to the sequence ORR+MOVK. The result is messy: it misses
some possible sequences, and the order of the checks means we sometimes
emit two MOVKs when we only need one.
Instead, just use a simple loop to try all possible two-instruction
ORR+MOVK sequences.
Differential Revision: https://reviews.llvm.org/D47176
llvm-svn: 333218
Diffstat (limited to 'llvm/test/CodeGen/AArch64/arm64-variadic-aapcs.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-variadic-aapcs.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-variadic-aapcs.ll b/llvm/test/CodeGen/AArch64/arm64-variadic-aapcs.ll index 7592596be4d..09125293cac 100644 --- a/llvm/test/CodeGen/AArch64/arm64-variadic-aapcs.ll +++ b/llvm/test/CodeGen/AArch64/arm64-variadic-aapcs.ll @@ -32,8 +32,8 @@ define void @test_simple(i32 %n, ...) { ; CHECK: add [[VR_TOP:x[0-9]+]], [[VR_TOPTMP]], #128 ; CHECK: str [[VR_TOP]], [x[[VA_LIST]], #16] -; CHECK: mov [[GRVR:x[0-9]+]], #-545460846720 -; CHECK: movk [[GRVR]], #65480 +; CHECK: mov [[GRVR:x[0-9]+]], #-56 +; CHECK: movk [[GRVR]], #65408, lsl #32 ; CHECK: str [[GRVR]], [x[[VA_LIST]], #24] %addr = bitcast %va_list* @var to i8* |
