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| author | Amara Emerson <aemerson@apple.com> | 2018-01-02 16:30:47 +0000 |
|---|---|---|
| committer | Amara Emerson <aemerson@apple.com> | 2018-01-02 16:30:47 +0000 |
| commit | 854d10d10bf5ae315fac43d37f84626d7a9c5edf (patch) | |
| tree | fedf15410244258fca600aeab7ef71db382c113d /llvm/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll | |
| parent | 0d0f1ff719c3b92a8bbda4327e8dd6e9cf936a09 (diff) | |
| download | bcm5719-llvm-854d10d10bf5ae315fac43d37f84626d7a9c5edf.tar.gz bcm5719-llvm-854d10d10bf5ae315fac43d37f84626d7a9c5edf.zip | |
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
Tests updated to explicitly use fast-isel at -O0 instead of implicitly.
This change also allows an explicit -fast-isel option to override an
implicitly enabled global-isel. Otherwise -fast-isel would have no effect at -O0.
Differential Revision: https://reviews.llvm.org/D41362
llvm-svn: 321655
Diffstat (limited to 'llvm/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll b/llvm/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll index e72c2b7989d..98851917999 100644 --- a/llvm/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll +++ b/llvm/test/CodeGen/AArch64/arm64-simd-scalar-to-vector.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -mcpu=cyclone | FileCheck %s -; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -O0 -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST +; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -O0 -fast-isel -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST define <16 x i8> @foo(<16 x i8> %a) nounwind optsize readnone ssp { ; CHECK: uaddlv.16b h0, v0 |
