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| author | Juergen Ributzka <juergen@apple.com> | 2014-10-15 18:58:07 +0000 |
|---|---|---|
| committer | Juergen Ributzka <juergen@apple.com> | 2014-10-15 18:58:07 +0000 |
| commit | f82c987a5cc1ecce7b5e3e11fff974e278e89c81 (patch) | |
| tree | 08cda2e4da29f9a9f9d0743045d87a4f029217af /llvm/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll | |
| parent | 6780f0f7a09add4fb38067c06c28e05742ee1f7d (diff) | |
| download | bcm5719-llvm-f82c987a5cc1ecce7b5e3e11fff974e278e89c81.tar.gz bcm5719-llvm-f82c987a5cc1ecce7b5e3e11fff974e278e89c81.zip | |
Reapply "[FastISel][AArch64] Add custom lowering for GEPs."
This is mostly a copy of the existing FastISel GEP code, but we have to
duplicate it for AArch64, because otherwise we would bail out even for simple
cases. This is because the standard fastEmit functions don't cover MUL at all
and ADD is lowered very inefficientily.
The original commit had a bug in the add emit logic, which has been fixed.
llvm-svn: 219831
Diffstat (limited to 'llvm/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll index 34394b2af0a..a8417027ce2 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll @@ -15,9 +15,8 @@ define void @main() nounwind { entry: ; CHECK: main ; CHECK: mov x29, sp -; CHECK: mov x[[REG:[0-9]+]], sp -; CHECK-NEXT: orr x[[REG1:[0-9]+]], xzr, #0x8 -; CHECK-NEXT: add x0, x[[REG]], x[[REG1]] +; CHECK: mov [[REG:x[0-9]+]], sp +; CHECK-NEXT: add x0, [[REG]], #8 %E = alloca %struct.S2Ty, align 4 %B = getelementptr inbounds %struct.S2Ty* %E, i32 0, i32 1 call void @takeS1(%struct.S1Ty* %B) |
