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authorKevin Qin <Kevin.Qin@arm.com>2014-06-24 05:37:27 +0000
committerKevin Qin <Kevin.Qin@arm.com>2014-06-24 05:37:27 +0000
commit93d45ecdbf6ad50b02f632dc6b66ec6d49b4f2bf (patch)
tree63284dff71ed467bc1eac9d7d4309812dd2074fb /llvm/test/CodeGen/AArch64/arm64-build-vector.ll
parent549210e783c7d4557c2f7ddce35f202e469b518d (diff)
downloadbcm5719-llvm-93d45ecdbf6ad50b02f632dc6b66ec6d49b4f2bf.tar.gz
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[AArch64] Fix a build_vector pattern match fail
caused by defect in isBuildVectorAllZeros(). llvm-svn: 211567
Diffstat (limited to 'llvm/test/CodeGen/AArch64/arm64-build-vector.ll')
-rw-r--r--llvm/test/CodeGen/AArch64/arm64-build-vector.ll10
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-build-vector.ll b/llvm/test/CodeGen/AArch64/arm64-build-vector.ll
index c109263cedb..00c0bc7cd3a 100644
--- a/llvm/test/CodeGen/AArch64/arm64-build-vector.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-build-vector.ll
@@ -33,3 +33,13 @@ define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind {
%4 = insertelement <4 x float> %3, float %d, i32 3
ret <4 x float> %4
}
+
+define <8 x i16> @build_all_zero(<8 x i16> %a) #1 {
+; CHECK-LABEL: build_all_zero:
+; CHECK: movn w[[GREG:[0-9]+]], #0x517f
+; CHECK-NEXT: fmov s[[FREG:[0-9]+]], w[[GREG]]
+; CHECK-NEXT: mul.8h v0, v0, v[[FREG]]
+ %b = add <8 x i16> %a, <i16 -32768, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>
+ %c = mul <8 x i16> %b, <i16 -20864, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>
+ ret <8 x i16> %c
+ }
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