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authorTim Northover <tnorthover@apple.com>2014-05-24 12:42:26 +0000
committerTim Northover <tnorthover@apple.com>2014-05-24 12:42:26 +0000
commitcc08e1fe1b3feef12a1eba31f8afcc3bbefc733e (patch)
tree944d86a337d00e62dbc49d2ff0aad7925472afa7 /llvm/test/CodeGen/AArch64/128bit_load_store.ll
parentf6ee78cfb7869dba4f797cbc0573bf02beac7810 (diff)
downloadbcm5719-llvm-cc08e1fe1b3feef12a1eba31f8afcc3bbefc733e.tar.gz
bcm5719-llvm-cc08e1fe1b3feef12a1eba31f8afcc3bbefc733e.zip
AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.
I'm doing this in two phases for a better "git blame" record. This commit removes the previous AArch64 backend and redirects all functionality to ARM64. It also deduplicates test-lines and removes orphaned AArch64 tests. The next step will be "git mv ARM64 AArch64" and rewire most of the tests. Hopefully LLVM is still functional, though it would be even better if no-one ever had to care because the rename happens straight afterwards. llvm-svn: 209576
Diffstat (limited to 'llvm/test/CodeGen/AArch64/128bit_load_store.ll')
-rw-r--r--llvm/test/CodeGen/AArch64/128bit_load_store.ll7
1 files changed, 0 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/AArch64/128bit_load_store.ll b/llvm/test/CodeGen/AArch64/128bit_load_store.ll
index 2360e858b57..56f67873f84 100644
--- a/llvm/test/CodeGen/AArch64/128bit_load_store.ll
+++ b/llvm/test/CodeGen/AArch64/128bit_load_store.ll
@@ -1,4 +1,3 @@
-; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=neon| FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=neon | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
define void @test_store_f128(fp128* %ptr, fp128 %val) #0 {
@@ -21,9 +20,6 @@ define void @test_vstrq_p128(i128* %ptr, i128 %val) #0 {
; CHECK-ARM64-LABEL: test_vstrq_p128
; CHECK-ARM64: stp {{x[0-9]+}}, {{x[0-9]+}}, [{{x[0-9]+}}]
-; CHECK-AARCH64-LABEL: test_vstrq_p128
-; CHECK-AARCH64: str {{x[0-9]+}}, [{{x[0-9]+}}, #8]
-; CHECK-AARCH64: str {{x[0-9]+}}, [{{x[0-9]+}}]
entry:
%0 = bitcast i128* %ptr to fp128*
%1 = bitcast i128 %val to fp128
@@ -35,9 +31,6 @@ define i128 @test_vldrq_p128(i128* readonly %ptr) #2 {
; CHECK-ARM64-LABEL: test_vldrq_p128
; CHECK-ARM64: ldp {{x[0-9]+}}, {{x[0-9]+}}, [{{x[0-9]+}}]
-; CHECK-AARCH64-LABEL: test_vldrq_p128
-; CHECK-AARCH64: ldr {{x[0-9]+}}, [{{x[0-9]+}}]
-; CHECK-AARCH64: ldr {{x[0-9]+}}, [{{x[0-9]+}}, #8]
entry:
%0 = bitcast i128* %ptr to fp128*
%1 = load fp128* %0, align 16
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