[IR] Redefine Freeze instruction

Summary:
This patch redefines freeze instruction from being UnaryOperator to a subclass of UnaryInstruction.

ConstantExpr freeze is removed, as discussed in the previous review.
FreezeOperator is not added because there's no ConstantExpr freeze.
`freeze i8* null` test is added to `test/Bindings/llvm-c/freeze.ll` as well, because the null pointer-related bug in `tools/llvm-c/echo.cpp` is now fixed.
InstVisitor has visitFreeze now because freeze is not unaryop anymore.

Reviewers: whitequark, deadalnix, craig.topper, jdoerfert, lebedev.ri

Reviewed By: craig.topper, lebedev.ri

Subscribers: regehr, nlopes, mehdi_amini, hiraditya, steven_wu, dexonsmith, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69932

1 files changed, 12 insertions, 14 deletions

diff --git a/llvm/test/Bitcode/compatibility.ll b/llvm/test/Bitcode/compatibility.ll
index c7b22c7999d..055397f125b 100644
--- a/llvm/test/Bitcode/compatibility.ll
+++ b/llvm/test/Bitcode/compatibility.ll
@@ -1172,17 +1172,9 @@ continue:
 }
 
 ; Instructions -- Unary Operations
-define void @instructions.unops(double %op1, i32 %op2, <2 x i32> %op3, i8* %op4) {
+define void @instructions.unops(double %op1) {
   fneg double %op1
   ; CHECK: fneg double %op1
-  freeze i32 %op2
-  ; CHECK: freeze i32 %op2
-  freeze double %op1
-  ; CHECK: freeze double %op1
-  freeze <2 x i32> %op3
-  ; CHECK: freeze <2 x i32> %op3
-  freeze i8* %op4
-  ; CHECK: freeze i8* %op4
   ret void
 }
 
@@ -1377,7 +1369,7 @@ define void @instructions.conversions() {
 }
 
 ; Instructions -- Other Operations
-define void @instructions.other(i32 %op1, i32 %op2, half %fop1, half %fop2) {
+define void @instructions.other(i32 %op1, i32 %op2, half %fop1, half %fop2, <2 x i32> %vop, i8* %pop) {
 entry:
   icmp eq  i32 %op1, %op2
   ; CHECK: icmp eq  i32 %op1, %op2
@@ -1457,6 +1449,16 @@ exit:
   tail call ghccc nonnull i32* @f.nonnull() minsize
   ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #7
 
+  freeze i32 %op1
+  ; CHECK: freeze i32 %op1
+  freeze i32 10
+  ; CHECK: freeze i32 10
+  freeze half %fop1
+  ; CHECK: freeze half %fop1
+  freeze <2 x i32> %vop
+  ; CHECK: freeze <2 x i32> %vop
+  freeze i8* %pop
+  ; CHECK: freeze i8* %pop
   ret void
 }
 
@@ -1834,10 +1836,6 @@ define void @instructions.strictfp() strictfp {
   ret void
 }
 
-define i64 @constexpr_freeze() {
-  ret i64 freeze (i64 32)
-}
-
 ; immarg attribute
 declare void @llvm.test.immarg.intrinsic(i32 immarg)
 ; CHECK: declare void @llvm.test.immarg.intrinsic(i32 immarg)