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author | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2014-08-19 21:08:27 +0000 |
---|---|---|
committer | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2014-08-19 21:08:27 +0000 |
commit | c8eccd1147800b8a2720ded56f42c7342812430e (patch) | |
tree | 67cc1cda49c602aef1a4d32b066ad40b80c68c7a /llvm/test/Bitcode | |
parent | 9163561d648c0e9c1bb29a102da2611a2b3dc49b (diff) | |
download | bcm5719-llvm-c8eccd1147800b8a2720ded56f42c7342812430e.tar.gz bcm5719-llvm-c8eccd1147800b8a2720ded56f42c7342812430e.zip |
verify-uselistorder: Force -preserve-bc-use-list-order
llvm-svn: 216022
Diffstat (limited to 'llvm/test/Bitcode')
43 files changed, 43 insertions, 43 deletions
diff --git a/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll b/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll index 9c238db17a8..35bf7abd584 100644 --- a/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll +++ b/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll @@ -1,7 +1,7 @@ ; This test ensures that we get a bitcast constant expression in and out, ; not a sitofp constant expression. ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; CHECK: bitcast ( @G = external global i32 diff --git a/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll b/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll index e45ddaccf6a..9405fbbe79b 100644 --- a/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll +++ b/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis -disable-output -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; PR4373 @foo = weak global { i32 } zeroinitializer diff --git a/llvm/test/Bitcode/aggregateInstructions.3.2.ll b/llvm/test/Bitcode/aggregateInstructions.3.2.ll index bb93afe058a..59aafd1de23 100644 --- a/llvm/test/Bitcode/aggregateInstructions.3.2.ll +++ b/llvm/test/Bitcode/aggregateInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread instructions with aggregate operands diff --git a/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll b/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll index 6d309bd5c5f..ed3981b465a 100644 --- a/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll +++ b/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; Tests vclz and vcnt define <4 x i16> @vclz16(<4 x i16>* %A) nounwind { diff --git a/llvm/test/Bitcode/atomic.ll b/llvm/test/Bitcode/atomic.ll index e45ef16aaee..c09e74c1c2f 100644 --- a/llvm/test/Bitcode/atomic.ll +++ b/llvm/test/Bitcode/atomic.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) { cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst diff --git a/llvm/test/Bitcode/attributes-3.3.ll b/llvm/test/Bitcode/attributes-3.3.ll index 441e3562c4e..b564425c373 100644 --- a/llvm/test/Bitcode/attributes-3.3.ll +++ b/llvm/test/Bitcode/attributes-3.3.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; attributes-3.3.ll.bc was generated by passing this file to llvm-as-3.3. ; The test checks that LLVM does not silently misread attributes of diff --git a/llvm/test/Bitcode/attributes.ll b/llvm/test/Bitcode/attributes.ll index 154355829d3..c75ee80dc66 100644 --- a/llvm/test/Bitcode/attributes.ll +++ b/llvm/test/Bitcode/attributes.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; PR12696 define void @f1(i8 zeroext) diff --git a/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll b/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll index 30c21da2d24..cec16839f9c 100644 --- a/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll +++ b/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; BinaryFloatOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread binary float instructions from diff --git a/llvm/test/Bitcode/binaryIntInstructions.3.2.ll b/llvm/test/Bitcode/binaryIntInstructions.3.2.ll index ba10399a1f5..e484ff129a7 100644 --- a/llvm/test/Bitcode/binaryIntInstructions.3.2.ll +++ b/llvm/test/Bitcode/binaryIntInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread binary integer instructions from diff --git a/llvm/test/Bitcode/bitwiseInstructions.3.2.ll b/llvm/test/Bitcode/bitwiseInstructions.3.2.ll index ad251104ec7..aaaf4f543a8 100644 --- a/llvm/test/Bitcode/bitwiseInstructions.3.2.ll +++ b/llvm/test/Bitcode/bitwiseInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread bitwise instructions from diff --git a/llvm/test/Bitcode/blockaddress.ll b/llvm/test/Bitcode/blockaddress.ll index 83fae48bf2f..db109dfe469 100644 --- a/llvm/test/Bitcode/blockaddress.ll +++ b/llvm/test/Bitcode/blockaddress.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; PR9857 define void @f(i8** nocapture %ptr1) { diff --git a/llvm/test/Bitcode/calling-conventions.3.2.ll b/llvm/test/Bitcode/calling-conventions.3.2.ll index 6f3d1d03650..f36e9f82a2d 100644 --- a/llvm/test/Bitcode/calling-conventions.3.2.ll +++ b/llvm/test/Bitcode/calling-conventions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; calling-conventions.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not silently misread calling conventions of diff --git a/llvm/test/Bitcode/case-ranges-3.3.ll b/llvm/test/Bitcode/case-ranges-3.3.ll index 1998b35f2e3..020b37f49db 100644 --- a/llvm/test/Bitcode/case-ranges-3.3.ll +++ b/llvm/test/Bitcode/case-ranges-3.3.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; case-ranges.ll.bc was generated by passing this file to llvm-as from the 3.3 ; release of LLVM. This tests that the bitcode for switches from that release diff --git a/llvm/test/Bitcode/cmpxchg-upgrade.ll b/llvm/test/Bitcode/cmpxchg-upgrade.ll index 78a9cc936d3..125729e99cd 100644 --- a/llvm/test/Bitcode/cmpxchg-upgrade.ll +++ b/llvm/test/Bitcode/cmpxchg-upgrade.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc | FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just ; before the IR change on this file. diff --git a/llvm/test/Bitcode/conversionInstructions.3.2.ll b/llvm/test/Bitcode/conversionInstructions.3.2.ll index 2aa156404dd..14dbbecde34 100644 --- a/llvm/test/Bitcode/conversionInstructions.3.2.ll +++ b/llvm/test/Bitcode/conversionInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; conversionOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread conversion instructions from diff --git a/llvm/test/Bitcode/drop-debug-info.ll b/llvm/test/Bitcode/drop-debug-info.ll index d2f281ac0a6..df8594fda2b 100644 --- a/llvm/test/Bitcode/drop-debug-info.ll +++ b/llvm/test/Bitcode/drop-debug-info.ll @@ -1,6 +1,6 @@ ; RUN: llvm-as < %s -o %t.bc 2>&1 >/dev/null | FileCheck -check-prefix=WARN %s ; RUN: llvm-dis < %t.bc | FileCheck %s -; RUN: verify-uselistorder < %t.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %t.bc define i32 @main() { entry: diff --git a/llvm/test/Bitcode/extractelement.ll b/llvm/test/Bitcode/extractelement.ll index 945dd394fa5..90a883d6f02 100644 --- a/llvm/test/Bitcode/extractelement.ll +++ b/llvm/test/Bitcode/extractelement.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -constprop | llvm-dis -disable-output -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; PR3465 define double @test() { diff --git a/llvm/test/Bitcode/flags.ll b/llvm/test/Bitcode/flags.ll index 17e923dc6a4..6febaa6b40d 100644 --- a/llvm/test/Bitcode/flags.ll +++ b/llvm/test/Bitcode/flags.ll @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llvm-dis > %t0 ; RUN: opt -S < %s > %t1 ; RUN: diff %t0 %t1 -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; PR6140 ; Make sure the flags are serialized/deserialized properly for both diff --git a/llvm/test/Bitcode/function-encoding-rel-operands.ll b/llvm/test/Bitcode/function-encoding-rel-operands.ll index 02265f90678..08e3fc01805 100644 --- a/llvm/test/Bitcode/function-encoding-rel-operands.ll +++ b/llvm/test/Bitcode/function-encoding-rel-operands.ll @@ -1,7 +1,7 @@ ; Basic sanity test to check that instruction operands are encoded with ; relative IDs. ; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; CHECK: FUNCTION_BLOCK ; CHECK: INST_BINOP {{.*}}op0=1 op1=1 diff --git a/llvm/test/Bitcode/global-variables.3.2.ll b/llvm/test/Bitcode/global-variables.3.2.ll index dec4694bcf8..afd9cb14194 100644 --- a/llvm/test/Bitcode/global-variables.3.2.ll +++ b/llvm/test/Bitcode/global-variables.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; global-variables.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not silently misread global variables attributes of diff --git a/llvm/test/Bitcode/inalloca.ll b/llvm/test/Bitcode/inalloca.ll index b8550052aa6..84abe176d65 100644 --- a/llvm/test/Bitcode/inalloca.ll +++ b/llvm/test/Bitcode/inalloca.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; inalloca should roundtrip. diff --git a/llvm/test/Bitcode/linkage-types-3.2.ll b/llvm/test/Bitcode/linkage-types-3.2.ll index a3791aa130a..dc6c90c0b46 100644 --- a/llvm/test/Bitcode/linkage-types-3.2.ll +++ b/llvm/test/Bitcode/linkage-types-3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; linkage-types-3.2.ll.bc was generated by passing this file to llvm-as-3.2 ; The test checks that LLVM does not silently misread linkage types of diff --git a/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll b/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll index dfd0d83b7fc..df0cf7653e5 100644 --- a/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll +++ b/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc | FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; local-linkage-default-visibility.3.4.ll.bc was generated by passing this file ; to llvm-as-3.4. The test checks that LLVM upgrades visibility of symbols diff --git a/llvm/test/Bitcode/memInstructions.3.2.ll b/llvm/test/Bitcode/memInstructions.3.2.ll index 8b0c85032d9..d826dd12062 100644 --- a/llvm/test/Bitcode/memInstructions.3.2.ll +++ b/llvm/test/Bitcode/memInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread memory related instructions of diff --git a/llvm/test/Bitcode/metadata-2.ll b/llvm/test/Bitcode/metadata-2.ll index 06f844283ff..bb957a7f4bf 100644 --- a/llvm/test/Bitcode/metadata-2.ll +++ b/llvm/test/Bitcode/metadata-2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis -disable-output -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s %0 = type { %object.ModuleInfo.__vtbl*, i8*, %"byte[]", %1, %"ClassInfo[]", i32, void ()*, void ()*, void ()*, i8*, void ()* } ; type %0 %1 = type { i64, %object.ModuleInfo* } ; type %1 %2 = type { i32, void ()* } ; type %2 diff --git a/llvm/test/Bitcode/metadata.ll b/llvm/test/Bitcode/metadata.ll index c721bd429e5..955b48b7f45 100644 --- a/llvm/test/Bitcode/metadata.ll +++ b/llvm/test/Bitcode/metadata.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis -disable-output -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s !llvm.foo = !{!0} !0 = metadata !{i32 42} diff --git a/llvm/test/Bitcode/miscInstructions.3.2.ll b/llvm/test/Bitcode/miscInstructions.3.2.ll index bd7aa9cb7e4..d9945fc195f 100644 --- a/llvm/test/Bitcode/miscInstructions.3.2.ll +++ b/llvm/test/Bitcode/miscInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; miscInstructions.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread miscellaneous instructions of diff --git a/llvm/test/Bitcode/old-aliases.ll b/llvm/test/Bitcode/old-aliases.ll index f77caff9822..b73b1a90afb 100644 --- a/llvm/test/Bitcode/old-aliases.ll +++ b/llvm/test/Bitcode/old-aliases.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc | FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; old-aliases.bc consist of this file assembled with an old llvm-as (3.5 trunk) ; from when aliases contained a ConstantExpr. diff --git a/llvm/test/Bitcode/ptest-new.ll b/llvm/test/Bitcode/ptest-new.ll index 66ef530de43..c17ddc910df 100644 --- a/llvm/test/Bitcode/ptest-new.ll +++ b/llvm/test/Bitcode/ptest-new.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s define i32 @foo(<2 x i64> %bar) nounwind { entry: diff --git a/llvm/test/Bitcode/ptest-old.ll b/llvm/test/Bitcode/ptest-old.ll index e4d826b950e..c1e1cae3736 100644 --- a/llvm/test/Bitcode/ptest-old.ll +++ b/llvm/test/Bitcode/ptest-old.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s define i32 @foo(<4 x float> %bar) nounwind { entry: diff --git a/llvm/test/Bitcode/select.ll b/llvm/test/Bitcode/select.ll index 5a5a524d752..3ad06796dcc 100644 --- a/llvm/test/Bitcode/select.ll +++ b/llvm/test/Bitcode/select.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s define <2 x i32> @main() { ret <2 x i32> select (<2 x i1> <i1 false, i1 undef>, <2 x i32> zeroinitializer, <2 x i32> <i32 0, i32 undef>) diff --git a/llvm/test/Bitcode/shuffle.ll b/llvm/test/Bitcode/shuffle.ll index a9e94f68ecd..b84641cef23 100644 --- a/llvm/test/Bitcode/shuffle.ll +++ b/llvm/test/Bitcode/shuffle.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis -disable-output -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; <rdar://problem/8622574> ; tests the bitcodereader can handle the case where the reader will initially diff --git a/llvm/test/Bitcode/ssse3_palignr.ll b/llvm/test/Bitcode/ssse3_palignr.ll index d75fe151255..8254513a0c5 100644 --- a/llvm/test/Bitcode/ssse3_palignr.ll +++ b/llvm/test/Bitcode/ssse3_palignr.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -S | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; CHECK-NOT: {@llvm\\.palign} define <4 x i32> @align1(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp { diff --git a/llvm/test/Bitcode/tailcall.ll b/llvm/test/Bitcode/tailcall.ll index 266457423b9..01190d74c34 100644 --- a/llvm/test/Bitcode/tailcall.ll +++ b/llvm/test/Bitcode/tailcall.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; Check that musttail and tail roundtrip. diff --git a/llvm/test/Bitcode/terminatorInstructions.3.2.ll b/llvm/test/Bitcode/terminatorInstructions.3.2.ll index 96876fb78c4..1bdbdcc4c98 100644 --- a/llvm/test/Bitcode/terminatorInstructions.3.2.ll +++ b/llvm/test/Bitcode/terminatorInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread terminator instructions from diff --git a/llvm/test/Bitcode/upgrade-global-ctors.ll b/llvm/test/Bitcode/upgrade-global-ctors.ll index 4816f0dc294..d7afcdd0c18 100644 --- a/llvm/test/Bitcode/upgrade-global-ctors.ll +++ b/llvm/test/Bitcode/upgrade-global-ctors.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; Global constructors should no longer be upgraded when reading bitcode. ; CHECK: @llvm.global_ctors = appending global [0 x { i32, void ()* }] zeroinitializer diff --git a/llvm/test/Bitcode/upgrade-loop-metadata.ll b/llvm/test/Bitcode/upgrade-loop-metadata.ll index 806eda64434..cebc583e9dc 100644 --- a/llvm/test/Bitcode/upgrade-loop-metadata.ll +++ b/llvm/test/Bitcode/upgrade-loop-metadata.ll @@ -1,7 +1,7 @@ ; Test to make sure loop vectorizer metadata is automatically upgraded. ; ; RUN: llvm-dis < %s.bc | FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc define void @_Z28loop_with_vectorize_metadatav() { entry: diff --git a/llvm/test/Bitcode/upgrade-tbaa.ll b/llvm/test/Bitcode/upgrade-tbaa.ll index 4c7decffb54..23b4d7d52b2 100644 --- a/llvm/test/Bitcode/upgrade-tbaa.ll +++ b/llvm/test/Bitcode/upgrade-tbaa.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s ; Function Attrs: nounwind define void @_Z4testPiPf(i32* nocapture %pI, float* nocapture %pF) #0 { diff --git a/llvm/test/Bitcode/use-list-order.ll b/llvm/test/Bitcode/use-list-order.ll index 0abbc5fe635..6617b9c5edf 100644 --- a/llvm/test/Bitcode/use-list-order.ll +++ b/llvm/test/Bitcode/use-list-order.ll @@ -1,4 +1,4 @@ -; RUN: verify-uselistorder < %s -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s @a = global [4 x i1] [i1 0, i1 1, i1 0, i1 1] @b = alias i1* getelementptr ([4 x i1]* @a, i64 0, i64 2) diff --git a/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll b/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll index ac7a9411bda..ad70f0542e8 100644 --- a/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll +++ b/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; vaArgIntrinsic.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread variable argument intrinsic instructions diff --git a/llvm/test/Bitcode/vectorInstructions.3.2.ll b/llvm/test/Bitcode/vectorInstructions.3.2.ll index 6bd52b9eb4c..94c193a1c44 100644 --- a/llvm/test/Bitcode/vectorInstructions.3.2.ll +++ b/llvm/test/Bitcode/vectorInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread vector operations of diff --git a/llvm/test/Bitcode/visibility-styles.3.2.ll b/llvm/test/Bitcode/visibility-styles.3.2.ll index 00672cbab03..e36c0e04a80 100644 --- a/llvm/test/Bitcode/visibility-styles.3.2.ll +++ b/llvm/test/Bitcode/visibility-styles.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; visibility-styles.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not silently misread visibility styles of diff --git a/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll b/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll index 07006f7c516..76b857b5e22 100644 --- a/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll +++ b/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc | FileCheck %s -; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order +; RUN: verify-uselistorder < %s.bc ; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just ; before the IR change on this file. |