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| author | Anders Carlsson <andersca@mac.com> | 2007-12-14 06:38:54 +0000 |
|---|---|---|
| committer | Anders Carlsson <andersca@mac.com> | 2007-12-14 06:38:54 +0000 |
| commit | f924f34b6bb2831a9ec2643261a8a469c1b1e7e9 (patch) | |
| tree | b2b898dd7f4fed107c639ff5feedcdceb75cbd33 /llvm/test/Assembler/AutoUpgradeIntrinsics.ll | |
| parent | c3286e9cef1d8805bb16119f849f374190f6424d (diff) | |
| download | bcm5719-llvm-f924f34b6bb2831a9ec2643261a8a469c1b1e7e9.tar.gz bcm5719-llvm-f924f34b6bb2831a9ec2643261a8a469c1b1e7e9.zip | |
All MMX shift instructions took a <2 x i32> vector as the shift amount parameter. Change this to be <1 x i64> instead, which matches the assembler instruction.
llvm-svn: 45027
Diffstat (limited to 'llvm/test/Assembler/AutoUpgradeIntrinsics.ll')
| -rw-r--r-- | llvm/test/Assembler/AutoUpgradeIntrinsics.ll | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/llvm/test/Assembler/AutoUpgradeIntrinsics.ll b/llvm/test/Assembler/AutoUpgradeIntrinsics.ll index fad3d4e4e85..15f638ce06f 100644 --- a/llvm/test/Assembler/AutoUpgradeIntrinsics.ll +++ b/llvm/test/Assembler/AutoUpgradeIntrinsics.ll @@ -6,6 +6,8 @@ ; RUN: not grep {llvm\\.part\\.select\\.i\[0-9\]*\\.i\[0-9\]*} ; RUN: llvm-as < %s | llvm-dis | \ ; RUN: not grep {llvm\\.bswap\\.i\[0-9\]*\\.i\[0-9\]*} +; RUN: llvm-as < %s | llvm-dis | \ +; RUN: grep {llvm\\.x86\\.mmx\\.ps} | grep {2 x i32> | count 6 declare i32 @llvm.ctpop.i28(i28 %val) declare i32 @llvm.cttz.i29(i29 %val) @@ -50,3 +52,30 @@ define i32 @test_bswap(i32 %A, i16 %B) { ret i32 %d } +declare <4 x i16> @llvm.x86.mmx.psra.w(<4 x i16>, <2 x i32>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.psll.w(<4 x i16>, <2 x i32>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.psrl.w(<4 x i16>, <2 x i32>) nounwind readnone +define void @sh16(<4 x i16> %A, <2 x i32> %B) { + %r1 = call <4 x i16> @llvm.x86.mmx.psra.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0] + %r2 = call <4 x i16> @llvm.x86.mmx.psll.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0] + %r3 = call <4 x i16> @llvm.x86.mmx.psrl.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0] + ret void +} + +declare <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32>, <2 x i32>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.psll.d(<2 x i32>, <2 x i32>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.psrl.d(<2 x i32>, <2 x i32>) nounwind readnone +define void @sh32(<2 x i32> %A, <2 x i32> %B) { + %r1 = call <2 x i32> @llvm.x86.mmx.psra.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0] + %r2 = call <2 x i32> @llvm.x86.mmx.psll.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0] + %r3 = call <2 x i32> @llvm.x86.mmx.psrl.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0] + ret void +} + +declare <1 x i64> @llvm.x86.mmx.psll.q(<1 x i64>, <2 x i32>) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.psrl.q(<1 x i64>, <2 x i32>) nounwind readnone +define void @sh64(<1 x i64> %A, <2 x i32> %B) { + %r1 = call <1 x i64> @llvm.x86.mmx.psll.q( <1 x i64> %A, <2 x i32> %B ) ; <<1 x i64>> [#uses=0] + %r2 = call <1 x i64> @llvm.x86.mmx.psrl.q( <1 x i64> %A, <2 x i32> %B ) ; <<1 x i64>> [#uses=0] + ret void +} |
