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| author | Tony Linthicum <tlinth@codeaurora.org> | 2011-12-12 21:14:40 +0000 |
|---|---|---|
| committer | Tony Linthicum <tlinth@codeaurora.org> | 2011-12-12 21:14:40 +0000 |
| commit | 1213a7a57fdcb6c875b3f79103fc96d3e9d30b40 (patch) | |
| tree | 531d34e916e847cebbd717082d4f696a51610812 /llvm/projects/sample/configure | |
| parent | 45c41641664d8ff44c03f6205312d347081882b0 (diff) | |
| download | bcm5719-llvm-1213a7a57fdcb6c875b3f79103fc96d3e9d30b40.tar.gz bcm5719-llvm-1213a7a57fdcb6c875b3f79103fc96d3e9d30b40.zip | |
Hexagon backend support
llvm-svn: 146412
Diffstat (limited to 'llvm/projects/sample/configure')
| -rwxr-xr-x | llvm/projects/sample/configure | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/llvm/projects/sample/configure b/llvm/projects/sample/configure index dd4305d99c6..860faa29271 100755 --- a/llvm/projects/sample/configure +++ b/llvm/projects/sample/configure @@ -1401,9 +1401,8 @@ Optional Features: (default is YES) --enable-targets Build specific host targets: all or target1,target2,... Valid targets are: host, x86, - x86_64, sparc, powerpc, arm, mips, spu, - xcore, msp430, ptx, cbe, and cpp - (default=all) + x86_64, sparc, powerpc, arm, mips, spu, hexagon, + xcore, msp430, ptx, cbe, and cpp (default=all) --enable-cbe-printf-a Enable C Backend output with hex floating point via %a (default is YES) --enable-bindings Build specific language bindings: @@ -3844,6 +3843,7 @@ else mips-*) llvm_cv_target_arch="Mips" ;; xcore-*) llvm_cv_target_arch="XCore" ;; msp430-*) llvm_cv_target_arch="MSP430" ;; + hexagon-*) llvm_cv_target_arch="Hexagon" ;; mblaze-*) llvm_cv_target_arch="MBlaze" ;; ptx-*) llvm_cv_target_arch="PTX" ;; *) llvm_cv_target_arch="Unknown" ;; @@ -5045,6 +5045,8 @@ else ;; MSP430) TARGET_HAS_JIT=0 ;; + Hexagon) TARGET_HAS_JIT=0 + ;; MBlaze) TARGET_HAS_JIT=0 ;; PTX) TARGET_HAS_JIT=0 @@ -5233,7 +5235,7 @@ if test "$enableval" = host-only ; then enableval=host fi case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips CellSPU XCore MSP430 CBackend CppBackend MBlaze PTX" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips CellSPU XCore MSP430 Hexagon CBackend CppBackend MBlaze PTX" ;; *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do case "$a_target" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; @@ -5245,6 +5247,7 @@ case "$enableval" in spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;; xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;; msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;; + hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;; cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;; cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;; mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;; @@ -5260,6 +5263,7 @@ case "$enableval" in CellSPU|SPU) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;; XCore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;; MSP430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;; + Hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;; PTX) TARGETS_TO_BUILD="PTX $TARGETS_TO_BUILD" ;; *) { { echo "$as_me:$LINENO: error: Can not set target to build" >&5 echo "$as_me: error: Can not set target to build" >&2;} |
