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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-09-10 18:10:49 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-09-10 18:10:49 +0000 |
commit | ff347d3ea44c368bc19d6dc4a38076b357bf4ae4 (patch) | |
tree | a50dd2b4a8ed8ef7beb13e51adf7ff6d1cbed766 /llvm/lib | |
parent | 5876189ff1161169b4767beec337a3cfa2d7ca4e (diff) | |
download | bcm5719-llvm-ff347d3ea44c368bc19d6dc4a38076b357bf4ae4.tar.gz bcm5719-llvm-ff347d3ea44c368bc19d6dc4a38076b357bf4ae4.zip |
[X86][SSE] Move combineTo call out of combineX86ShufflesConstants. NFCI.
Move towards making it possible to use the shuffle combines for cases where we don't want to call DCI.CombineTo() with the result.
llvm-svn: 312886
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index c94fc5ed44b..75ac6d9d8d4 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -28087,11 +28087,12 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root, // Attempt to constant fold all of the constant source ops. // Returns true if the entire shuffle is folded to a constant. // TODO: Extend this to merge multiple constant Ops and update the mask. -static bool combineX86ShufflesConstants(const SmallVectorImpl<SDValue> &Ops, - ArrayRef<int> Mask, SDValue Root, - bool HasVariableMask, SelectionDAG &DAG, - TargetLowering::DAGCombinerInfo &DCI, - const X86Subtarget &Subtarget) { +static SDValue combineX86ShufflesConstants(const SmallVectorImpl<SDValue> &Ops, + ArrayRef<int> Mask, SDValue Root, + bool HasVariableMask, + SelectionDAG &DAG, + TargetLowering::DAGCombinerInfo &DCI, + const X86Subtarget &Subtarget) { MVT VT = Root.getSimpleValueType(); unsigned SizeInBits = VT.getSizeInBits(); @@ -28108,14 +28109,14 @@ static bool combineX86ShufflesConstants(const SmallVectorImpl<SDValue> &Ops, OneUseConstantOp |= SrcOp.hasOneUse(); if (!getTargetConstantBitsFromNode(SrcOp, MaskSizeInBits, UndefEltsOps[i], RawBitsOps[i])) - return false; + return SDValue(); } // Only fold if at least one of the constants is only used once or // the combined shuffle has included a variable mask shuffle, this // is to avoid constant pool bloat. if (!OneUseConstantOp && !HasVariableMask) - return false; + return SDValue(); // Shuffle the constant bits according to the mask. APInt UndefElts(NumMaskElts, 0); @@ -28167,8 +28168,7 @@ static bool combineX86ShufflesConstants(const SmallVectorImpl<SDValue> &Ops, SDLoc DL(Root); SDValue CstOp = getConstVector(ConstantBitData, UndefElts, MaskVT, DAG, DL); DCI.AddToWorklist(CstOp.getNode()); - DCI.CombineTo(Root.getNode(), DAG.getBitcast(VT, CstOp)); - return true; + return DAG.getBitcast(VT, CstOp); } /// \brief Fully generic combining of x86 shuffle instructions. @@ -28375,9 +28375,11 @@ static bool combineX86ShufflesRecursively(ArrayRef<SDValue> SrcOps, return true; // Attempt to constant fold all of the constant source ops. - if (combineX86ShufflesConstants(Ops, Mask, Root, HasVariableMask, DAG, DCI, - Subtarget)) + if (SDValue Cst = combineX86ShufflesConstants( + Ops, Mask, Root, HasVariableMask, DAG, DCI, Subtarget)) { + DCI.CombineTo(Root.getNode(), Cst); return true; + } // We can only combine unary and binary shuffle mask cases. if (Ops.size() > 2) |