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authorTim Northover <tnorthover@apple.com>2014-07-10 14:18:46 +0000
committerTim Northover <tnorthover@apple.com>2014-07-10 14:18:46 +0000
commitfee2adefbac0d10c79d86de4b9bb0ba1c491345a (patch)
tree84550eb4ac4cf6e8c419f1514f4d6bf3c545434e /llvm/lib
parent7e527423f54f413ae304900ee4b3ef4a17cd4fb1 (diff)
downloadbcm5719-llvm-fee2adefbac0d10c79d86de4b9bb0ba1c491345a.tar.gz
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AArch64: correctly fast-isel i8 & i16 multiplies
We were asking for a register for type i8 or i16 which caused an assert. rdar://problem/17620015 llvm-svn: 212718
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AArch64/AArch64FastISel.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
index c4e0ff0c38c..2164d77b790 100644
--- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
@@ -1907,6 +1907,7 @@ bool AArch64FastISel::SelectMul(const Instruction *I) {
case MVT::i32:
ZReg = AArch64::WZR;
Opc = AArch64::MADDWrrr;
+ SrcVT = MVT::i32;
break;
case MVT::i64:
ZReg = AArch64::XZR;
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