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author | Tim Northover <tnorthover@apple.com> | 2016-12-13 18:25:38 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2016-12-13 18:25:38 +0000 |
commit | fe7c59adb8fd3b89e2b8379a5e16cf4fac68930f (patch) | |
tree | 7889cf84e77cf463a6576b5b6f10386558d81768 /llvm/lib | |
parent | c8c1032c0c52d7f851ccfa29ec850b24047ebcb9 (diff) | |
download | bcm5719-llvm-fe7c59adb8fd3b89e2b8379a5e16cf4fac68930f.tar.gz bcm5719-llvm-fe7c59adb8fd3b89e2b8379a5e16cf4fac68930f.zip |
GlobalISel: fix GOT accesses on AArch64.
We were using the correct pseudo-instruction, but because the operand's flags
weren't set correctly we still ended up emitting incorrect relocations during
MC lowering.
llvm-svn: 289566
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp index a5303fcdbb6..4274b4080cc 100644 --- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -662,9 +662,10 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const { return false; } unsigned char OpFlags = STI.ClassifyGlobalReference(GV, TM); - if (OpFlags & AArch64II::MO_GOT) + if (OpFlags & AArch64II::MO_GOT) { I.setDesc(TII.get(AArch64::LOADgot)); - else { + I.getOperand(1).setTargetFlags(OpFlags); + } else { I.setDesc(TII.get(AArch64::MOVaddr)); I.getOperand(1).setTargetFlags(OpFlags | AArch64II::MO_PAGE); MachineInstrBuilder MIB(MF, I); |