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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-09-21 00:45:59 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-09-21 00:45:59 +0000 |
| commit | fdcdd88d5718c4785b7d3e3bc9b9e866b56590d5 (patch) | |
| tree | ff6b656c4eb6b7b0f4d31f4045c9844ee4e9f255 /llvm/lib | |
| parent | be88ae0eb05d3036977fcd7816de9b18403d7756 (diff) | |
| download | bcm5719-llvm-fdcdd88d5718c4785b7d3e3bc9b9e866b56590d5.tar.gz bcm5719-llvm-fdcdd88d5718c4785b7d3e3bc9b9e866b56590d5.zip | |
AMDGPU: Fix crash on immediate operand
We can have a v_mac with an immediate src0.
We can still fold if it's an inline immediate,
otherwise it already uses the constant bus.
llvm-svn: 313852
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 075717e1f8b..b2fbcce66d5 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -2174,8 +2174,12 @@ MachineInstr *SIInstrInfo::convertToThreeAddress(MachineFunction::iterator &MBB, int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0); const MachineOperand *Src0 = &MI.getOperand(Src0Idx); + if (!Src0->isReg() && !Src0->isImm()) + return nullptr; + if (Src0->isImm() && !isInlineConstant(MI, Src0Idx, *Src0)) return nullptr; + break; } } @@ -2193,7 +2197,7 @@ MachineInstr *SIInstrInfo::convertToThreeAddress(MachineFunction::iterator &MBB, if (!Src0Mods && !Src1Mods && !Clamp && !Omod && // If we have an SGPR input, we will violate the constant bus restriction. - !RI.isSGPRReg(MBB->getParent()->getRegInfo(), Src0->getReg())) { + (!Src0->isReg() || !RI.isSGPRReg(MBB->getParent()->getRegInfo(), Src0->getReg()))) { if (auto Imm = getFoldableImm(Src2)) { return BuildMI(*MBB, MI, MI.getDebugLoc(), get(IsF16 ? AMDGPU::V_MADAK_F16 : AMDGPU::V_MADAK_F32)) |
