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| author | Simon Dardis <simon.dardis@mips.com> | 2018-04-24 10:19:29 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@mips.com> | 2018-04-24 10:19:29 +0000 |
| commit | fce722e6f87f7b4825a7e9b4b1ff61fa69469d96 (patch) | |
| tree | ef52b7cc7e107c8e1d6f15031b9decec85ed26e3 /llvm/lib | |
| parent | 04fbffcc52fab45c62bc9ce14ff26e1ffbef9b2e (diff) | |
| download | bcm5719-llvm-fce722e6f87f7b4825a7e9b4b1ff61fa69469d96.tar.gz bcm5719-llvm-fce722e6f87f7b4825a7e9b4b1ff61fa69469d96.zip | |
[mips] Correct the patterns for bswap
Guard the MIPS64 variant correctly for i64, mark the MIPS32 version as not
in microMIPS and provide the microMIPS version.
Additionally, remove a related stale XFAIL'd test as bswap has its own test
case providing coverage.
Reviewers: smaksimovic, abeserminji, atanasyan
Differential Revision: https://reviews.llvm.org/D45816
llvm-svn: 330705
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Mips/MicroMipsInstrInfo.td | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/Mips64InstrInfo.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.td | 6 |
3 files changed, 7 insertions, 4 deletions
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td index 1730d74a21f..f1fec5ccd3a 100644 --- a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td @@ -1124,6 +1124,9 @@ let Predicates = [InMicroMips] in { (SUBu_MM GPR32:$lhs, GPR32:$rhs)>; } +def : MipsPat<(bswap GPR32:$rt), (ROTR_MM (WSBH_MM GPR32:$rt), 16)>, + ISA_MICROMIPS; + def : MipsPat<(MipsTailCall (iPTR tglobaladdr:$dst)), (TAILCALL_MM tglobaladdr:$dst)>, ISA_MICROMIPS32_NOT_MIPS32R6; def : MipsPat<(MipsTailCall (iPTR texternalsym:$dst)), diff --git a/llvm/lib/Target/Mips/Mips64InstrInfo.td b/llvm/lib/Target/Mips/Mips64InstrInfo.td index 49226f19b80..93f8e09ca2b 100644 --- a/llvm/lib/Target/Mips/Mips64InstrInfo.td +++ b/llvm/lib/Target/Mips/Mips64InstrInfo.td @@ -728,7 +728,7 @@ def : MipsPat<(i64 (sext_inreg GPR64:$src, i32)), (SLL64_64 GPR64:$src)>; // bswap MipsPattern -def : MipsPat<(bswap GPR64:$rt), (DSHD (DSBH GPR64:$rt))>; +def : MipsPat<(bswap GPR64:$rt), (DSHD (DSBH GPR64:$rt))>, ISA_MIPS64R2; // Carry pattern let AdditionalPredicates = [NotInMicroMips] in { diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index 7b4aaeac032..b65f1ab8bff 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -3030,10 +3030,10 @@ let AdditionalPredicates = [NotInMicroMips] in { defm : SetgtPats<GPR32, SLT, SLTu>; defm : SetgePats<GPR32, XORi, SLT, SLTu>; defm : SetgeImmPats<GPR32, XORi, SLTi, SLTiu>; -} -// bswap pattern -def : MipsPat<(bswap GPR32:$rt), (ROTR (WSBH GPR32:$rt), 16)>; + // bswap pattern + def : MipsPat<(bswap GPR32:$rt), (ROTR (WSBH GPR32:$rt), 16)>, ISA_MIPS32R2; +} // Load halfword/word patterns. let AddedComplexity = 40 in { |
