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authorCraig Topper <craig.topper@intel.com>2017-08-25 05:04:34 +0000
committerCraig Topper <craig.topper@intel.com>2017-08-25 05:04:34 +0000
commitfc53dc2d43a04430b951ccc063c626fe3174910a (patch)
tree05cc41deecb6934a66934cbcf5252964a6d0995c /llvm/lib
parent892979effc920252246c8e6909b552e936748a76 (diff)
downloadbcm5719-llvm-fc53dc2d43a04430b951ccc063c626fe3174910a.tar.gz
bcm5719-llvm-fc53dc2d43a04430b951ccc063c626fe3174910a.zip
[X86] Use isUInt and isShiftedUInt instead of using our own masking and compares. NFCI
While there use a local variable instead of calling C->getZExtValue() repeatedly. llvm-svn: 311764
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelDAGToDAG.cpp34
1 files changed, 13 insertions, 21 deletions
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 1610d690321..ab1eca01d8a 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -2645,12 +2645,12 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
X86::isZeroNode(N1)) {
ConstantSDNode *C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
if (!C) break;
+ uint64_t Mask = C->getZExtValue();
// For example, convert "testl %eax, $8" to "testb %al, $8"
- if ((C->getZExtValue() & ~UINT64_C(0xff)) == 0 &&
- (!(C->getZExtValue() & 0x80) ||
- hasNoSignedComparisonUses(Node))) {
- SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), dl, MVT::i8);
+ if (isUInt<8>(Mask) &&
+ (!(Mask & 0x80) || hasNoSignedComparisonUses(Node))) {
+ SDValue Imm = CurDAG->getTargetConstant(Mask, dl, MVT::i8);
SDValue Reg = N0.getOperand(0);
// On x86-32, only the ABCD registers have 8-bit subregisters.
@@ -2681,12 +2681,10 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
}
// For example, "testl %eax, $2048" to "testb %ah, $8".
- if ((C->getZExtValue() & ~UINT64_C(0xff00)) == 0 &&
- (!(C->getZExtValue() & 0x8000) ||
- hasNoSignedComparisonUses(Node))) {
+ if (isShiftedUInt<8, 8>(Mask) &&
+ (!(Mask & 0x8000) || hasNoSignedComparisonUses(Node))) {
// Shift the immediate right by 8 bits.
- SDValue ShiftedImm = CurDAG->getTargetConstant(C->getZExtValue() >> 8,
- dl, MVT::i8);
+ SDValue ShiftedImm = CurDAG->getTargetConstant(Mask >> 8, dl, MVT::i8);
SDValue Reg = N0.getOperand(0);
// Put the value in an ABCD register.
@@ -2718,12 +2716,9 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
}
// For example, "testl %eax, $32776" to "testw %ax, $32776".
- if ((C->getZExtValue() & ~UINT64_C(0xffff)) == 0 &&
- N0.getValueType() != MVT::i16 &&
- (!(C->getZExtValue() & 0x8000) ||
- hasNoSignedComparisonUses(Node))) {
- SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), dl,
- MVT::i16);
+ if (isUInt<16>(Mask) && N0.getValueType() != MVT::i16 &&
+ (!(Mask & 0x8000) || hasNoSignedComparisonUses(Node))) {
+ SDValue Imm = CurDAG->getTargetConstant(Mask, dl, MVT::i16);
SDValue Reg = N0.getOperand(0);
// Extract the 16-bit subregister.
@@ -2741,12 +2736,9 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
}
// For example, "testq %rax, $268468232" to "testl %eax, $268468232".
- if ((C->getZExtValue() & ~UINT64_C(0xffffffff)) == 0 &&
- N0.getValueType() == MVT::i64 &&
- (!(C->getZExtValue() & 0x80000000) ||
- hasNoSignedComparisonUses(Node))) {
- SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), dl,
- MVT::i32);
+ if (isUInt<32>(Mask) && N0.getValueType() == MVT::i64 &&
+ (!(Mask & 0x80000000) || hasNoSignedComparisonUses(Node))) {
+ SDValue Imm = CurDAG->getTargetConstant(Mask, dl, MVT::i32);
SDValue Reg = N0.getOperand(0);
// Extract the 32-bit subregister.
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