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authorQuentin Colombet <qcolombet@apple.com>2016-04-08 16:26:22 +0000
committerQuentin Colombet <qcolombet@apple.com>2016-04-08 16:26:22 +0000
commitfab1cfe6732d21f2e978c4573ddd37173238141f (patch)
treed279cc1301297fa1d1aeaa31a238cf5297f3bc13 /llvm/lib
parent436c90619c16bd8a7466b0105fa087c7147373c2 (diff)
downloadbcm5719-llvm-fab1cfe6732d21f2e978c4573ddd37173238141f.tar.gz
bcm5719-llvm-fab1cfe6732d21f2e978c4573ddd37173238141f.zip
[MIR] Teach the mir printer how to print the register bank.
For now, we put the register bank in the Class field since a register may only have one of those at a given time. The downside of that representation is that if a register class and a register bank have the same name, we will not be able to distinguish them. llvm-svn: 265796
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/MIRPrinter.cpp13
1 files changed, 8 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 10013a94ddb..1bbb73eed02 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -14,23 +14,24 @@
#include "MIRPrinter.h"
#include "llvm/ADT/STLExtras.h"
+#include "llvm/CodeGen/GlobalISel/RegisterBank.h"
+#include "llvm/CodeGen/MIRYamlMapping.h"
#include "llvm/CodeGen/MachineConstantPool.h"
-#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/MIRYamlMapping.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/Constants.h"
-#include "llvm/IR/Instructions.h"
#include "llvm/IR/IRPrintingPasses.h"
+#include "llvm/IR/Instructions.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/ModuleSlotTracker.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/MemoryBuffer.h"
-#include "llvm/Support/raw_ostream.h"
#include "llvm/Support/YAMLTraits.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
@@ -210,9 +211,11 @@ void MIRPrinter::convert(yaml::MachineFunction &MF,
unsigned Reg = TargetRegisterInfo::index2VirtReg(I);
yaml::VirtualRegisterDefinition VReg;
VReg.ID = I;
- if (RegInfo.getRegClass(Reg))
+ if (RegInfo.getRegClassOrNull(Reg))
VReg.Class =
StringRef(TRI->getRegClassName(RegInfo.getRegClass(Reg))).lower();
+ else if (RegInfo.getRegBankOrNull(Reg))
+ VReg.Class = StringRef(RegInfo.getRegBankOrNull(Reg)->getName()).lower();
else {
VReg.Class = std::string("_");
assert(RegInfo.getSize(Reg) && "Generic registers must have a size");
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