summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@intel.com>2018-01-26 07:15:17 +0000
committerCraig Topper <craig.topper@intel.com>2018-01-26 07:15:17 +0000
commitfaa56f7b081816d4e1c87eed4b47f17fe9cbe9f5 (patch)
treea87b6d7b61628796b915b3bb1f932d0aaf517b77 /llvm/lib
parentad8ce0b8008fcd52804f23e17b91043d26d43263 (diff)
downloadbcm5719-llvm-faa56f7b081816d4e1c87eed4b47f17fe9cbe9f5.tar.gz
bcm5719-llvm-faa56f7b081816d4e1c87eed4b47f17fe9cbe9f5.zip
[X86] Remove LowerVSETCC code for handling vXi1 setcc with vXi8/vXi16 input type. NFC
These kinds of setccs are promoted by a DAG combine before they ever get to legalization. llvm-svn: 323501
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp9
1 files changed, 3 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9f7cbb78664..f9c665e08c7 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -17944,12 +17944,9 @@ static SDValue LowerVSETCC(SDValue Op, const X86Subtarget &Subtarget,
if (VT.getVectorElementType() == MVT::i1) {
// In AVX-512 architecture setcc returns mask with i1 elements,
// But there is no compare instruction for i8 and i16 elements in KNL.
- // In this case use SSE compare
- if (OpVT.getScalarSizeInBits() >= 32 || Subtarget.hasBWI())
- return LowerIntVSETCC_AVX512(Op, DAG);
-
- return DAG.getNode(ISD::TRUNCATE, dl, VT,
- DAG.getNode(ISD::SETCC, dl, OpVT, Op0, Op1, CC));
+ assert((OpVT.getScalarSizeInBits() >= 32 || Subtarget.hasBWI()) &&
+ "Unexpected operand type");
+ return LowerIntVSETCC_AVX512(Op, DAG);
}
// Lower using XOP integer comparisons.
OpenPOWER on IntegriCloud