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author | Stefan Pintilie <stefanp@ca.ibm.com> | 2019-04-02 16:56:01 +0000 |
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committer | Stefan Pintilie <stefanp@ca.ibm.com> | 2019-04-02 16:56:01 +0000 |
commit | fa6cd5ceb92282cab41435e7625f360085c4677d (patch) | |
tree | cddf350757a7f3b271c558620cae5ff97ada668c /llvm/lib | |
parent | d3d5d76a7b7e8c0cfcb21a37b2fd9b4b2a67a0b8 (diff) | |
download | bcm5719-llvm-fa6cd5ceb92282cab41435e7625f360085c4677d.tar.gz bcm5719-llvm-fa6cd5ceb92282cab41435e7625f360085c4677d.zip |
[PowerPC] Fix reversed bit issue in DCMX mask for "xvtstdcdp" and "xvtstdcsp" P9 implementation
Did experiments on power 9 machine, checked the outputs for NaN & Infinity+
cases with corresponding DCMX bit set. Confirmed the DCMX mask bit for NaN and
infinity+ are reversed.
This patch fixes the issue.
Patch by Victor Huang.
Differential Revision: https://reviews.llvm.org/D59384
llvm-svn: 357494
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrFormats.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrFormats.td b/llvm/lib/Target/PowerPC/PPCInstrFormats.td index 0460c64ee43..7091f790da5 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrFormats.td +++ b/llvm/lib/Target/PowerPC/PPCInstrFormats.td @@ -1183,9 +1183,9 @@ class XX2_RD6_DCMX7_RS6<bits<6> opcode, bits<4> xo1, bits<3> xo2, let Inst{11-15} = DCMX{4-0}; let Inst{16-20} = XB{4-0}; let Inst{21-24} = xo1; - let Inst{25} = DCMX{5}; + let Inst{25} = DCMX{6}; let Inst{26-28} = xo2; - let Inst{29} = DCMX{6}; + let Inst{29} = DCMX{5}; let Inst{30} = XB{5}; let Inst{31} = XT{5}; } |