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| author | Owen Anderson <resistor@mac.com> | 2011-04-06 22:45:55 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-04-06 22:45:55 +0000 |
| commit | f9bd6bad8a902b923cc53ebe584ad0f75a90ee02 (patch) | |
| tree | 0c45b84d2d38a2b477613998c333a060dc71ec0a /llvm/lib | |
| parent | d715ec82b4ad12c598dd9e2329bdad9b887f397f (diff) | |
| download | bcm5719-llvm-f9bd6bad8a902b923cc53ebe584ad0f75a90ee02.tar.gz bcm5719-llvm-f9bd6bad8a902b923cc53ebe584ad0f75a90ee02.zip | |
Cleanups from Jim: remove redundant constraints and a dead FIXME.
llvm-svn: 129036
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 373529307cc..b787d3575b3 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -940,16 +940,13 @@ let usesCustomInserter = 1 in { multiclass AI1_adde_sube_s_irs<PatFrag opnode, bit Commutable = 0> { def Sri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm), Size4Bytes, IIC_iALUi, - [(set GPR:$Rd, (opnode GPR:$Rn, so_imm:$imm))]>, - Requires<[IsARM]>; + [(set GPR:$Rd, (opnode GPR:$Rn, so_imm:$imm))]>; def Srr : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), Size4Bytes, IIC_iALUr, - [(set GPR:$Rd, (opnode GPR:$Rn, GPR:$Rm))]>, - Requires<[IsARM]>; + [(set GPR:$Rd, (opnode GPR:$Rn, GPR:$Rm))]>; def Srs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift), Size4Bytes, IIC_iALUsr, - [(set GPR:$Rd, (opnode GPR:$Rn, so_reg:$shift))]>, - Requires<[IsARM]>; + [(set GPR:$Rd, (opnode GPR:$Rn, so_reg:$shift))]>; } } } @@ -2298,17 +2295,14 @@ def RSCrs : AsI1<0b0111, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift), } } -// FIXME: Allow these to be predicated. // NOTE: CPSR def omitted because it will be handled by the custom inserter. let usesCustomInserter = 1, Uses = [CPSR] in { def RSCSri : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm), Size4Bytes, IIC_iALUi, - [(set GPR:$Rd, (sube_dead_carry so_imm:$imm, GPR:$Rn))]>, - Requires<[IsARM]>; + [(set GPR:$Rd, (sube_dead_carry so_imm:$imm, GPR:$Rn))]>; def RSCSrs : ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift), Size4Bytes, IIC_iALUsr, - [(set GPR:$Rd, (sube_dead_carry so_reg:$shift, GPR:$Rn))]>, - Requires<[IsARM]>; + [(set GPR:$Rd, (sube_dead_carry so_reg:$shift, GPR:$Rn))]>; } // (sub X, imm) gets canonicalized to (add X, -imm). Match this form. |
