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authorCraig Topper <craig.topper@intel.com>2018-07-24 23:44:12 +0000
committerCraig Topper <craig.topper@intel.com>2018-07-24 23:44:12 +0000
commitf8fcee70a30475ca6a8f960d2569db05f91c0332 (patch)
treeaee7b95e376a3fa58bdaa64b6e0438ae5cd9aa1a /llvm/lib
parent641a29df6d99cdcec4951f956f6ee53f1f5fdf3b (diff)
downloadbcm5719-llvm-f8fcee70a30475ca6a8f960d2569db05f91c0332.tar.gz
bcm5719-llvm-f8fcee70a30475ca6a8f960d2569db05f91c0332.zip
[X86] Change multiply by 26 to use two multiplies by 5 and an add instead of multiply by 3 and 9 and a subtract.
Same number of operations, but ending in an add is friendlier due to it being commutable. llvm-svn: 337869
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp14
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 12f6d409a60..352e8170007 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -33698,10 +33698,10 @@ static SDValue combineMulSpecial(uint64_t MulAmt, SDNode *N, SelectionDAG &DAG,
return Result;
};
- auto combineMulMulAddOrSub = [&](bool isAdd) {
+ auto combineMulMulAddOrSub = [&](int Mul1, int Mul2, bool isAdd) {
SDValue Result = DAG.getNode(X86ISD::MUL_IMM, DL, VT, N->getOperand(0),
- DAG.getConstant(9, DL, VT));
- Result = DAG.getNode(ISD::MUL, DL, VT, Result, DAG.getConstant(3, DL, VT));
+ DAG.getConstant(Mul1, DL, VT));
+ Result = DAG.getNode(ISD::MUL, DL, VT, Result, DAG.getConstant(Mul2, DL, VT));
Result = DAG.getNode(isAdd ? ISD::ADD : ISD::SUB, DL, VT, Result,
N->getOperand(0));
return Result;
@@ -33730,15 +33730,15 @@ static SDValue combineMulSpecial(uint64_t MulAmt, SDNode *N, SelectionDAG &DAG,
// mul x, 23 => sub ((shl (mul x, 3), 3), x)
return combineMulShlAddOrSub(3, 3, /*isAdd*/ false);
case 26:
- // mul x, 26 => sub ((mul (mul x, 9), 3), x)
- return combineMulMulAddOrSub(/*isAdd*/ false);
+ // mul x, 26 => add ((mul (mul x, 5), 5), x)
+ return combineMulMulAddOrSub(5, 5, /*isAdd*/ true);
case 28:
// mul x, 28 => add ((mul (mul x, 9), 3), x)
- return combineMulMulAddOrSub(/*isAdd*/ true);
+ return combineMulMulAddOrSub(9, 3, /*isAdd*/ true);
case 29:
// mul x, 29 => add (add ((mul (mul x, 9), 3), x), x)
return DAG.getNode(ISD::ADD, DL, VT, N->getOperand(0),
- combineMulMulAddOrSub(/*isAdd*/ true));
+ combineMulMulAddOrSub(9, 3, /*isAdd*/ true));
}
return SDValue();
}
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