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| author | Tim Northover <tnorthover@apple.com> | 2014-07-18 08:43:24 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-07-18 08:43:24 +0000 |
| commit | f861de3d7bea208aa7c2dbf8c095735d9fa38b2e (patch) | |
| tree | acfd2d9bd8285fb942b41faa470a8d2832867ff0 /llvm/lib | |
| parent | 5e54fe14a4c808749751a6c287e5f3847963e159 (diff) | |
| download | bcm5719-llvm-f861de3d7bea208aa7c2dbf8c095735d9fa38b2e.tar.gz bcm5719-llvm-f861de3d7bea208aa7c2dbf8c095735d9fa38b2e.zip | |
R600: support f16 -> f64 conversion intrinsic.
Unfortunately, we don't seem to have a direct truncation, but the
extension can be legally split into two operations so we should
support that.
llvm-svn: 213357
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUISelLowering.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index 89d5b08af41..42d2a13a398 100644 --- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -242,6 +242,8 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); } + setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); + const MVT ScalarIntVTs[] = { MVT::i32, MVT::i64 }; for (MVT VT : ScalarIntVTs) { setOperationAction(ISD::SREM, VT, Expand); |
