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| author | Sam Parker <sam.parker@arm.com> | 2019-03-15 13:36:37 +0000 |
|---|---|---|
| committer | Sam Parker <sam.parker@arm.com> | 2019-03-15 13:36:37 +0000 |
| commit | f82d4ed771a0d85da4d3c779e58a9be9ded3968f (patch) | |
| tree | a75fac4caf7b48cd6948d100689e52fd552b20b3 /llvm/lib | |
| parent | 6883d7e192fc81ba0ca1b9b4e55d54836b2712a4 (diff) | |
| download | bcm5719-llvm-f82d4ed771a0d85da4d3c779e58a9be9ded3968f.tar.gz bcm5719-llvm-f82d4ed771a0d85da4d3c779e58a9be9ded3968f.zip | |
[ARM] Remove EarlyCSE from backend
There is an issue with early CSE hitting an assert, so temporarily
remove the pass from the Arm backend.
Bug: https://bugs.llvm.org/show_bug.cgi?id=41081
Differential Revision: https://reviews.llvm.org/D59410
llvm-svn: 356259
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMTargetMachine.cpp | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp index bd075cda2e4..d0138274d57 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp +++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp @@ -403,11 +403,9 @@ void ARMPassConfig::addIRPasses() { TargetPassConfig::addIRPasses(); - // Run the parallel DSP pass and its helpers. - if (getOptLevel() == CodeGenOpt::Aggressive) { - addPass(createEarlyCSEPass()); + // Run the parallel DSP pass. + if (getOptLevel() == CodeGenOpt::Aggressive) addPass(createARMParallelDSPPass()); - } // Match interleaved memory accesses to ldN/stN intrinsics. if (TM->getOptLevel() != CodeGenOpt::None) |
