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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2016-11-09 17:50:46 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2016-11-09 17:50:46 +0000
commitf817efbbb0352049a9c6117a19f78690d1c55be4 (patch)
tree28afee3e3a6c352b5d9aaa56b98cd7f77bafabb7 /llvm/lib
parent7f00d0a125b98a1c68b05e7b6be4e89f39bf8240 (diff)
downloadbcm5719-llvm-f817efbbb0352049a9c6117a19f78690d1c55be4.tar.gz
bcm5719-llvm-f817efbbb0352049a9c6117a19f78690d1c55be4.zip
[Hexagon] Silence "sometimes uninitialized" warning in HexagonCopyToCombine
llvm-svn: 286383
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp b/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
index a07cfa74f5e..36080997ec6 100644
--- a/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
@@ -593,7 +593,9 @@ void HexagonCopyToCombine::combine(MachineInstr &I1, MachineInstr &I2,
else
SuperRC = &Hexagon::VecDblRegs128BRegClass;
SubLo = Hexagon::vsub_lo;
- }
+ } else
+ llvm_unreachable("Unexpected register class");
+
// Get the double word register.
unsigned DoubleRegDest = TRI->getMatchingSuperReg(LoRegDef, SubLo, SuperRC);
assert(DoubleRegDest != 0 && "Expect a valid register");
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