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authorSanjay Patel <spatel@rotateright.com>2019-05-28 17:37:58 +0000
committerSanjay Patel <spatel@rotateright.com>2019-05-28 17:37:58 +0000
commitf7980e727f2c08660b8bb23f80e131306faceca8 (patch)
tree036ca699db595266e03e8c2effe3b2cc5b961d3f /llvm/lib
parent04a087ace786b81711a1eaf8f7f092bb31d6dd25 (diff)
downloadbcm5719-llvm-f7980e727f2c08660b8bb23f80e131306faceca8.tar.gz
bcm5719-llvm-f7980e727f2c08660b8bb23f80e131306faceca8.zip
Revert "[x86] split 256-bit store of concatenated vectors"
This reverts commit d5a8637072f4c556b88156bd2f6237a2ead47d31. Most likely suspect for this bot failure: http://lab.llvm.org:8011/builders/clang-cmake-x86_64-avx2-linux/builds/9684 llvm-svn: 361850
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp11
1 files changed, 0 insertions, 11 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 73976f30374..7b4ce08b578 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1287,7 +1287,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom);
setOperationAction(ISD::INSERT_SUBVECTOR, VT, Legal);
setOperationAction(ISD::CONCAT_VECTORS, VT, Custom);
- setOperationAction(ISD::STORE, VT, Custom);
}
if (HasInt256)
@@ -21081,17 +21080,7 @@ static SDValue LowerStore(SDValue Op, const X86Subtarget &Subtarget,
if (St->isTruncatingStore())
return SDValue();
- // If this is a 256-bit store of concatenated ops, we are better off splitting
- // that store into two 128-bit stores. This avoids spurious use of 256-bit ops
- // and each half can execute independently. Some cores would split the op into
- // halves anyway, so the concat (vinsertf128) is purely an extra op.
MVT StoreVT = StoredVal.getSimpleValueType();
- if (StoreVT.is256BitVector()) {
- if (StoredVal.getOpcode() != ISD::CONCAT_VECTORS || !StoredVal.hasOneUse())
- return SDValue();
- return split256BitStore(St, DAG);
- }
-
assert(StoreVT.isVector() && StoreVT.getSizeInBits() == 64 &&
"Unexpected VT");
if (DAG.getTargetLoweringInfo().getTypeAction(*DAG.getContext(), StoreVT) !=
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