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author | Chris Lattner <sabre@nondot.org> | 2007-04-09 01:19:33 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2007-04-09 01:19:33 +0000 |
commit | f73d215023f1532a1ee5fd201c84af6c805a317a (patch) | |
tree | dcc4e1f8f16fa51689d765396ad3755d9c6755f4 /llvm/lib | |
parent | 4ca9cbb170781b920b080d1f886ab01c0bec574f (diff) | |
download | bcm5719-llvm-f73d215023f1532a1ee5fd201c84af6c805a317a.tar.gz bcm5719-llvm-f73d215023f1532a1ee5fd201c84af6c805a317a.zip |
Fix a bug introduced with my previous patch, where it didn't correctly handle
instructions which replace themselves when FI's are rewritten (common on ppc).
This fixes CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
llvm-svn: 35789
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/CodeGen/PrologEpilogInserter.cpp | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp index b76fa3f4eb4..b6e909507a4 100644 --- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp +++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp @@ -498,20 +498,22 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) { for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) { if (RS) RS->enterBasicBlock(BB); - for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I) { - for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) - if (I->getOperand(i).isFrameIndex()) { + for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) { + MachineInstr *MI = I++; + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) + if (MI->getOperand(i).isFrameIndex()) { // If this instruction has a FrameIndex operand, we need to use that // target machine register info object to eliminate it. - MRI.eliminateFrameIndex(I, RS); + MRI.eliminateFrameIndex(MI, RS); // Revisit the instruction in full. Some instructions (e.g. inline // asm instructions) can have multiple frame indices. - e = I->getNumOperands(); - i = -1U; + --I; + MI = 0; + break; } // Update register states. - if (RS) RS->forward(I); + if (RS && MI) RS->forward(MI); } } } |