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| author | Evan Cheng <evan.cheng@apple.com> | 2007-02-28 23:12:34 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-02-28 23:12:34 +0000 |
| commit | f6ca943638a8f78f2fd4b0e1d60136682171a9cd (patch) | |
| tree | ec6449dc9ab7c8ddd50175c49c6c288397a914db /llvm/lib | |
| parent | d373b9dc5949fb99a9f5e42d32af54dcf4773173 (diff) | |
| download | bcm5719-llvm-f6ca943638a8f78f2fd4b0e1d60136682171a9cd.tar.gz bcm5719-llvm-f6ca943638a8f78f2fd4b0e1d60136682171a9cd.zip | |
Doh. ARM::PC is obvious a reserved register.
llvm-svn: 34763
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMRegisterInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp index 2c53bfd6938..3dac8b030b3 100644 --- a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp @@ -315,6 +315,7 @@ ARMRegisterInfo::getCalleeSavedRegClasses() const { BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); Reserved.set(ARM::SP); + Reserved.set(ARM::PC); if (STI.isTargetDarwin() || hasFP(MF)) Reserved.set(FramePtr); // Some targets reserve R9. |
