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authorAnton Korobeynikov <asl@math.spbu.ru>2012-11-19 21:06:26 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2012-11-19 21:06:26 +0000
commitf65a638d942b87413a7181acb965e4c2fc4c0c6f (patch)
tree71146f0c8d3c98c1b1d2a92c4f04062621a88cc4 /llvm/lib
parent218894788d8735cf9ad7c2dbc53fbd3f6a31d84f (diff)
downloadbcm5719-llvm-f65a638d942b87413a7181acb965e4c2fc4c0c6f.tar.gz
bcm5719-llvm-f65a638d942b87413a7181acb965e4c2fc4c0c6f.zip
Factor out type info emission into separate routine.
It turned out that ARM wants different layout of type infos. This is yet another patch in attempt to fix PR7187 llvm-svn: 168325
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/ARMException.cpp49
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/DwarfException.cpp14
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/DwarfException.h3
3 files changed, 64 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/ARMException.cpp b/llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
index 8eea802765c..bbbdfd3c10f 100644
--- a/llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
@@ -93,3 +93,52 @@ void ARMException::EndFunction() {
Asm->OutStreamer.EmitFnEnd();
}
+
+void ARMException::EmitTypeInfos(unsigned TTypeEncoding) {
+ const std::vector<const GlobalVariable *> &TypeInfos = MMI->getTypeInfos();
+ const std::vector<unsigned> &FilterIds = MMI->getFilterIds();
+
+ bool VerboseAsm = Asm->OutStreamer.isVerboseAsm();
+
+ int Entry = 0;
+ // Emit the Catch TypeInfos.
+ if (VerboseAsm && !TypeInfos.empty()) {
+ Asm->OutStreamer.AddComment(">> Catch TypeInfos <<");
+ Asm->OutStreamer.AddBlankLine();
+ Entry = TypeInfos.size();
+ }
+
+ for (std::vector<const GlobalVariable *>::const_reverse_iterator
+ I = TypeInfos.rbegin(), E = TypeInfos.rend(); I != E; ++I) {
+ const GlobalVariable *GV = *I;
+ if (VerboseAsm)
+ Asm->OutStreamer.AddComment("TypeInfo " + Twine(Entry--));
+ if (GV)
+ Asm->EmitTTypeReference(GV, TTypeEncoding);
+ else
+ Asm->OutStreamer.EmitIntValue(0,Asm->GetSizeOfEncodedValue(TTypeEncoding),
+ 0);
+ }
+
+ // Emit the Exception Specifications.
+ if (VerboseAsm && !FilterIds.empty()) {
+ Asm->OutStreamer.AddComment(">> Filter TypeInfos <<");
+ Asm->OutStreamer.AddBlankLine();
+ Entry = 0;
+ }
+ for (std::vector<unsigned>::const_iterator
+ I = FilterIds.begin(), E = FilterIds.end(); I < E; ++I) {
+ unsigned TypeID = *I;
+ if (VerboseAsm) {
+ --Entry;
+ if (TypeID != 0)
+ Asm->OutStreamer.AddComment("FilterInfo " + Twine(Entry));
+ }
+
+ if (TypeID == 0)
+ Asm->OutStreamer.EmitIntValue(0,Asm->GetSizeOfEncodedValue(TTypeEncoding),
+ 0);
+ else
+ Asm->EmitTTypeReference(TypeInfos[TypeID - 1], TTypeEncoding);
+ }
+}
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfException.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfException.cpp
index 0fab389ab7f..4ebb75b9b80 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfException.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfException.cpp
@@ -672,6 +672,18 @@ void DwarfException::EmitExceptionTable() {
Asm->EmitSLEB128(Action.NextAction);
}
+ EmitTypeInfos(TTypeEncoding);
+
+ Asm->EmitAlignment(2);
+}
+
+void DwarfException::EmitTypeInfos(unsigned TTypeEncoding) {
+ const std::vector<const GlobalVariable *> &TypeInfos = MMI->getTypeInfos();
+ const std::vector<unsigned> &FilterIds = MMI->getFilterIds();
+
+ bool VerboseAsm = Asm->OutStreamer.isVerboseAsm();
+
+ int Entry = 0;
// Emit the Catch TypeInfos.
if (VerboseAsm && !TypeInfos.empty()) {
Asm->OutStreamer.AddComment(">> Catch TypeInfos <<");
@@ -708,8 +720,6 @@ void DwarfException::EmitExceptionTable() {
Asm->EmitULEB128(TypeID);
}
-
- Asm->EmitAlignment(2);
}
/// EndModule - Emit all exception information that should come after the
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfException.h b/llvm/lib/CodeGen/AsmPrinter/DwarfException.h
index fe9e4936095..74b1b13367a 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfException.h
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfException.h
@@ -121,6 +121,8 @@ protected:
/// catches in the function. This tables is reversed indexed base 1.
void EmitExceptionTable();
+ virtual void EmitTypeInfos(unsigned TTypeEncoding);
+
public:
//===--------------------------------------------------------------------===//
// Main entry points.
@@ -175,6 +177,7 @@ public:
};
class ARMException : public DwarfException {
+ void EmitTypeInfos(unsigned TTypeEncoding);
public:
//===--------------------------------------------------------------------===//
// Main entry points.
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