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authorBrian Gaeke <gaeke@uiuc.edu>2004-07-27 17:43:24 +0000
committerBrian Gaeke <gaeke@uiuc.edu>2004-07-27 17:43:24 +0000
commitf4c1d1ee34b45e7dbecc622054dad575cb85fbc0 (patch)
tree4c936f589b3fb66a6c4e99a2c18c7193b9ad3a4a /llvm/lib
parent64f51df06d8d3a6cd03085cc2cfde6a01b78d7a9 (diff)
downloadbcm5719-llvm-f4c1d1ee34b45e7dbecc622054dad575cb85fbc0.tar.gz
bcm5719-llvm-f4c1d1ee34b45e7dbecc622054dad575cb85fbc0.zip
TargetInstrInfo::getNOPOpCode() has been replaced by a reference to V9::NOP.
llvm-svn: 15279
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp3
-rw-r--r--llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp2
2 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
index 6aebcb5f841..26424ef7e10 100644
--- a/llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
+++ b/llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
@@ -26,6 +26,7 @@
#include "RegAllocCommon.h"
#include "RegClass.h"
#include "../LiveVar/FunctionLiveVarInfo.h"
+#include "../SparcV9InstrInfo.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/iPHINode.h"
@@ -550,7 +551,7 @@ void PhyRegAlloc::updateMachineCode()
// instruction out of the delay slot). On cond2 we need
// to insert a nop in place of the moved instruction
if (cond2) {
- MBB.insert(MII, BuildMI(TM.getInstrInfo()->getNOPOpCode(),1));
+ MBB.insert(MII, BuildMI(V9::NOP, 1));
}
}
else {
diff --git a/llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp b/llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp
index d80a543b476..0b7baabb8d3 100644
--- a/llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp
+++ b/llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp
@@ -39,7 +39,7 @@ DeleteInstruction(MachineBasicBlock& mvec,
// to update the I-I maps.
//
assert(ndelay == 1 && "Not yet handling multiple-delay-slot targets");
- BBI->replace(mii.getNOPOpCode(), 0);
+ BBI->replace(V9::NOP, 0);
return;
}
}
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