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authorDaniel Dunbar <daniel@zuster.org>2010-01-30 00:24:12 +0000
committerDaniel Dunbar <daniel@zuster.org>2010-01-30 00:24:12 +0000
commitf05d00787a331db6fbaa74baa843f8c9d9d795d6 (patch)
tree96120239fd61d1bf00c5d979d947f882511eb2bb /llvm/lib
parente9aa36c8951e9f95aaa1dcc7ef0a9e277f006dfb (diff)
downloadbcm5719-llvm-f05d00787a331db6fbaa74baa843f8c9d9d795d6.tar.gz
bcm5719-llvm-f05d00787a331db6fbaa74baa843f8c9d9d795d6.zip
X86.td: Refactor to bring operands that use print_pcrel_imm together.
llvm-svn: 94861
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.td32
1 files changed, 14 insertions, 18 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 6853af39d12..5041263a61f 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -182,10 +182,6 @@ def X86mul_imm : SDNode<"X86ISD::MUL_IMM", SDTIntBinOp>;
// X86 Operand Definitions.
//
-def i32imm_pcrel : Operand<i32> {
- let PrintMethod = "print_pcrel_imm";
-}
-
// A version of ptr_rc which excludes SP, ESP, and RSP. This is used for
// the index operand of an address, to conform to x86 encoding restrictions.
def ptr_rc_nosp : PointerLikeRegClass<1>;
@@ -211,11 +207,6 @@ def opaque48mem : X86MemOperand<"printopaquemem">;
def opaque80mem : X86MemOperand<"printopaquemem">;
def opaque512mem : X86MemOperand<"printopaquemem">;
-def offset8 : Operand<i64> { let PrintMethod = "print_pcrel_imm"; }
-def offset16 : Operand<i64> { let PrintMethod = "print_pcrel_imm"; }
-def offset32 : Operand<i64> { let PrintMethod = "print_pcrel_imm"; }
-def offset64 : Operand<i64> { let PrintMethod = "print_pcrel_imm"; }
-
def i8mem : X86MemOperand<"printi8mem">;
def i16mem : X86MemOperand<"printi16mem">;
def i32mem : X86MemOperand<"printi32mem">;
@@ -242,6 +233,20 @@ def lea32mem : Operand<i32> {
let ParserMatchClass = X86NoSegMemAsmOperand;
}
+let PrintMethod = "print_pcrel_imm" in {
+def i32imm_pcrel : Operand<i32>;
+
+def offset8 : Operand<i64>;
+def offset16 : Operand<i64>;
+def offset32 : Operand<i64>;
+def offset64 : Operand<i64>;
+
+// Branch targets have OtherVT type and print as pc-relative values.
+def brtarget : Operand<OtherVT>;
+def brtarget8 : Operand<OtherVT>;
+
+}
+
def SSECC : Operand<i8> {
let PrintMethod = "printSSECC";
}
@@ -261,15 +266,6 @@ def i32i8imm : Operand<i32> {
let ParserMatchClass = ImmSExt8AsmOperand;
}
-// Branch targets have OtherVT type and print as pc-relative values.
-def brtarget : Operand<OtherVT> {
- let PrintMethod = "print_pcrel_imm";
-}
-
-def brtarget8 : Operand<OtherVT> {
- let PrintMethod = "print_pcrel_imm";
-}
-
//===----------------------------------------------------------------------===//
// X86 Complex Pattern Definitions.
//
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