summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorMichael Liao <michael.hliao@gmail.com>2019-03-20 20:18:56 +0000
committerMichael Liao <michael.hliao@gmail.com>2019-03-20 20:18:56 +0000
commiteea5177d30845096ad70534545f1f67a31995210 (patch)
treec0519eb67bb6ba3617516930dc3094b8c79ab8ed /llvm/lib
parent27ef9518decb4129bc22814b33c88ed06813b224 (diff)
downloadbcm5719-llvm-eea5177d30845096ad70534545f1f67a31995210.tar.gz
bcm5719-llvm-eea5177d30845096ad70534545f1f67a31995210.zip
[AMDGPU] Fix clamp bit DAG operand
Summary: - Should use `targetconstant` instead of `constant` operand for clamp bit, which is expected as an immediate operand. Under certain conditions, such as a common `i1 false` constant is used in other place and selected before the instruction with clamp bit, register operand may be added instead of immediate one. Use `targetcosntant` to enforce that. Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59608 llvm-svn: 356608
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp13
1 files changed, 8 insertions, 5 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index 73c824aa153..ec55c2700e6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -931,9 +931,10 @@ void AMDGPUDAGToDAGISel::SelectUADDO_USUBO(SDNode *N) {
unsigned Opc = N->getOpcode() == ISD::UADDO ?
AMDGPU::V_ADD_I32_e64 : AMDGPU::V_SUB_I32_e64;
- CurDAG->SelectNodeTo(N, Opc, N->getVTList(),
- {N->getOperand(0), N->getOperand(1),
- CurDAG->getConstant(0, {}, MVT::i1)/*clamp bit*/});
+ CurDAG->SelectNodeTo(
+ N, Opc, N->getVTList(),
+ {N->getOperand(0), N->getOperand(1),
+ CurDAG->getTargetConstant(0, {}, MVT::i1) /*clamp bit*/});
}
void AMDGPUDAGToDAGISel::SelectFMA_W_CHAIN(SDNode *N) {
@@ -1041,7 +1042,8 @@ bool AMDGPUDAGToDAGISel::SelectDS1Addr1Offset(SDValue Addr, SDValue &Base,
unsigned SubOp = AMDGPU::V_SUB_I32_e32;
if (Subtarget->hasAddNoCarry()) {
SubOp = AMDGPU::V_SUB_U32_e64;
- Opnds.push_back(Zero); // clamp bit
+ Opnds.push_back(
+ CurDAG->getTargetConstant(0, {}, MVT::i1)); // clamp bit
}
MachineSDNode *MachineSub =
@@ -1119,7 +1121,8 @@ bool AMDGPUDAGToDAGISel::SelectDS64Bit4ByteAligned(SDValue Addr, SDValue &Base,
unsigned SubOp = AMDGPU::V_SUB_I32_e32;
if (Subtarget->hasAddNoCarry()) {
SubOp = AMDGPU::V_SUB_U32_e64;
- Opnds.push_back(Zero); // clamp bit
+ Opnds.push_back(
+ CurDAG->getTargetConstant(0, {}, MVT::i1)); // clamp bit
}
MachineSDNode *MachineSub
OpenPOWER on IntegriCloud