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| author | Evan Cheng <evan.cheng@apple.com> | 2007-10-23 06:42:42 +0000 | 
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-10-23 06:42:42 +0000 | 
| commit | ec271b104cea1cea74c6afe16cc9f6e61f403772 (patch) | |
| tree | b1fe345543b31fa8377f893731c2463c8e3513b6 /llvm/lib | |
| parent | c3def1530a3dde2d49ba26f7014a1094e7583799 (diff) | |
| download | bcm5719-llvm-ec271b104cea1cea74c6afe16cc9f6e61f403772.tar.gz bcm5719-llvm-ec271b104cea1cea74c6afe16cc9f6e61f403772.zip  | |
Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with right callee-saved defs set for ppc64.
llvm-svn: 43248
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 12 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.td | 6 | 
3 files changed, 18 insertions, 8 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 730bac653a4..372d2387ff7 100644 --- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -42,11 +42,13 @@ namespace {    class VISIBILITY_HIDDEN PPCDAGToDAGISel : public SelectionDAGISel {      PPCTargetMachine &TM;      PPCTargetLowering PPCLowering; +    const PPCSubtarget &PPCSubTarget;      unsigned GlobalBaseReg;    public:      PPCDAGToDAGISel(PPCTargetMachine &tm)        : SelectionDAGISel(PPCLowering), TM(tm), -        PPCLowering(*TM.getTargetLowering()) {} +        PPCLowering(*TM.getTargetLowering()), +        PPCSubTarget(*TM.getSubtargetImpl()) {}      virtual bool runOnFunction(Function &Fn) {        // Make sure we re-emit a set of the global base reg if necessary @@ -736,7 +738,7 @@ SDNode *PPCDAGToDAGISel::SelectSETCC(SDOperand Op) {    CCReg = CurDAG->getCopyToReg(CurDAG->getEntryNode(), CR7Reg, CCReg,                                  InFlag).getValue(1); -  if (TLI.getTargetMachine().getSubtarget<PPCSubtarget>().isGigaProcessor()) +  if (PPCSubTarget.isGigaProcessor())      IntCR = SDOperand(CurDAG->getTargetNode(PPC::MFOCRF, MVT::i32, CR7Reg,                                              CCReg), 0);    else @@ -859,7 +861,7 @@ SDNode *PPCDAGToDAGISel::Select(SDOperand Op) {      SDOperand InFlag = N->getOperand(1);      AddToISelQueue(InFlag);      // Use MFOCRF if supported. -    if (TLI.getTargetMachine().getSubtarget<PPCSubtarget>().isGigaProcessor()) +    if (PPCSubTarget.isGigaProcessor())        return CurDAG->getTargetNode(PPC::MFOCRF, MVT::i32,                                     N->getOperand(0), InFlag);      else diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td index 9d728cfc8ff..11d90b34155 100644 --- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td @@ -81,10 +81,13 @@ let isCall = 1, PPC970_Unit = 7,    def BL8_Macho  : IForm<18, 0, 1,                           (outs), (ins calltarget:$func, variable_ops),                            "bl $func", BrB, []>;  // See Pat patterns below. -                                def BLA8_Macho : IForm<18, 1, 1,                           (outs), (ins aaddr:$func, variable_ops),                           "bla $func", BrB, [(PPCcall_Macho (i64 imm:$func))]>; +  def BCTRL8_Macho : XLForm_2_ext<19, 528, 20, 0, 1,  +                                 (outs), (ins variable_ops), +                                 "bctrl", BrB, +                                 [(PPCbctrl_Macho)]>, Requires<[In64BitMode]>;  }  // ELF 64 ABI Calls = Macho ABI Calls @@ -99,11 +102,14 @@ let isCall = 1, PPC970_Unit = 7,    // Convenient aliases for call instructions    def BL8_ELF  : IForm<18, 0, 1,                         (outs), (ins calltarget:$func, variable_ops),  -                       "bl $func", BrB, []>;  // See Pat patterns below. -                             +                       "bl $func", BrB, []>;  // See Pat patterns below.                                def BLA8_ELF : IForm<18, 1, 1,                         (outs), (ins aaddr:$func, variable_ops),                         "bla $func", BrB, [(PPCcall_ELF (i64 imm:$func))]>; +  def BCTRL8_ELF : XLForm_2_ext<19, 528, 20, 0, 1, +                               (outs), (ins variable_ops), +                               "bctrl", BrB, +                               [(PPCbctrl_ELF)]>, Requires<[In64BitMode]>;  } diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index f62f7cb0e5e..6a08cea512e 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -304,6 +304,8 @@ def iaddroff : ComplexPattern<iPTR, 1, "SelectAddrImmOffs", [], []>;  //===----------------------------------------------------------------------===//  // PowerPC Instruction Predicate Definitions.  def FPContractions : Predicate<"!NoExcessFPPrecision">; +def In32BitMode  : Predicate<"!PPCSubTarget.isPPC64()">; +def In64BitMode  : Predicate<"PPCSubTarget.isPPC64()">;  //===----------------------------------------------------------------------===// @@ -409,7 +411,7 @@ let isCall = 1, PPC970_Unit = 7,    def BCTRL_Macho : XLForm_2_ext<19, 528, 20, 0, 1,                                    (outs), (ins variable_ops),                                   "bctrl", BrB, -                                 [(PPCbctrl_Macho)]>; +                                 [(PPCbctrl_Macho)]>, Requires<[In32BitMode]>;  }  // ELF ABI Calls. @@ -431,7 +433,7 @@ let isCall = 1, PPC970_Unit = 7,    def BCTRL_ELF : XLForm_2_ext<19, 528, 20, 0, 1,                                 (outs), (ins variable_ops),                                 "bctrl", BrB, -                               [(PPCbctrl_ELF)]>; +                               [(PPCbctrl_ELF)]>, Requires<[In32BitMode]>;  }  // DCB* instructions.  | 

