diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-31 17:48:35 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-31 17:48:35 +0000 |
| commit | eb6aef6db36ab681fb57cabd24c1f2be51fa5324 (patch) | |
| tree | d960f0a9d835b2dd8c78eec0cc31fe49f266abd3 /llvm/lib | |
| parent | d04a2d2d5e3183476b0e5d2fe3ea824de2f76917 (diff) | |
| download | bcm5719-llvm-eb6aef6db36ab681fb57cabd24c1f2be51fa5324.tar.gz bcm5719-llvm-eb6aef6db36ab681fb57cabd24c1f2be51fa5324.zip | |
[X86][AVX] Fold concat(broadcast(x),broadcast(x)) -> broadcast(x)
Differential Revision: https://reviews.llvm.org/D57514
llvm-svn: 352774
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index da479eb692c..18240ef0014 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -41651,12 +41651,11 @@ static SDValue combineInsertSubvector(SDNode *N, SelectionDAG &DAG, if (SubVec2 == SubVec && ISD::isNormalLoad(Ld) && Vec.hasOneUse()) return DAG.getNode(X86ISD::SUBV_BROADCAST, dl, OpVT, SubVec); - // If this is subv_broadcast insert into both halves, use a larger - // subv_broadcast. - // TODO - handle X86ISD::VBROADCAST as well? - if (SubVec.getOpcode() == X86ISD::SUBV_BROADCAST && SubVec == SubVec2) - return DAG.getNode(X86ISD::SUBV_BROADCAST, dl, OpVT, - SubVec.getOperand(0)); + // If this broadcast/subv_broadcast is inserted into both halves, use a + // larger broadcast/subv_broadcast. + if (SubVec == SubVec2 && (SubVec.getOpcode() == X86ISD::VBROADCAST || + SubVec.getOpcode() == X86ISD::SUBV_BROADCAST)) + return DAG.getNode(SubVec.getOpcode(), dl, OpVT, SubVec.getOperand(0)); // If we're inserting all zeros into the upper half, change this to // an insert into an all zeros vector. We will match this to a move |
