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| author | Marek Olsak <marek.olsak@amd.com> | 2014-07-11 17:11:52 +0000 |
|---|---|---|
| committer | Marek Olsak <marek.olsak@amd.com> | 2014-07-11 17:11:52 +0000 |
| commit | eac5062cc0fef587581d3242bd22f3da3dbfaf58 (patch) | |
| tree | cdf7a57bf19cbf4b9e543213633ebc309e07fc85 /llvm/lib | |
| parent | d8ecaeec02bddd18ddf2593140998c3fa4cf3b40 (diff) | |
| download | bcm5719-llvm-eac5062cc0fef587581d3242bd22f3da3dbfaf58.tar.gz bcm5719-llvm-eac5062cc0fef587581d3242bd22f3da3dbfaf58.zip | |
R600/SI: Use i32 vectors for resources and samplers
This affects new intrinsics only.
What surprises me is that v32i8 still works.
llvm-svn: 212831
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/SIInstructions.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/SIIntrinsics.td | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/R600/SIInstructions.td b/llvm/lib/Target/R600/SIInstructions.td index 097cc4b194b..e72203321a5 100644 --- a/llvm/lib/Target/R600/SIInstructions.td +++ b/llvm/lib/Target/R600/SIInstructions.td @@ -1855,7 +1855,7 @@ def : Pat < // Image + sampler class SampleRawPattern<SDPatternOperator name, MIMG opcode, ValueType vt> : Pat < - (name vt:$addr, v32i8:$rsrc, v16i8:$sampler, i32:$dmask, i32:$unorm, + (name vt:$addr, v8i32:$rsrc, v4i32:$sampler, i32:$dmask, i32:$unorm, i32:$r128, i32:$da, i32:$glc, i32:$slc, i32:$tfe, i32:$lwe), (opcode (as_i32imm $dmask), (as_i1imm $unorm), (as_i1imm $glc), (as_i1imm $da), (as_i1imm $r128), (as_i1imm $tfe), (as_i1imm $lwe), (as_i1imm $slc), @@ -1872,7 +1872,7 @@ multiclass SampleRawPatterns<SDPatternOperator name, string opcode> { // Image only class ImagePattern<SDPatternOperator name, MIMG opcode, ValueType vt> : Pat < - (name vt:$addr, v32i8:$rsrc, i32:$dmask, i32:$unorm, + (name vt:$addr, v8i32:$rsrc, i32:$dmask, i32:$unorm, i32:$r128, i32:$da, i32:$glc, i32:$slc, i32:$tfe, i32:$lwe), (opcode (as_i32imm $dmask), (as_i1imm $unorm), (as_i1imm $glc), (as_i1imm $da), (as_i1imm $r128), (as_i1imm $tfe), (as_i1imm $lwe), (as_i1imm $slc), diff --git a/llvm/lib/Target/R600/SIIntrinsics.td b/llvm/lib/Target/R600/SIIntrinsics.td index fc0c85008e7..027a0a2f516 100644 --- a/llvm/lib/Target/R600/SIIntrinsics.td +++ b/llvm/lib/Target/R600/SIIntrinsics.td @@ -58,8 +58,8 @@ let TargetPrefix = "SI", isTarget = 1 in { class SampleRaw : Intrinsic < [llvm_v4f32_ty], // vdata(VGPR) [llvm_anyint_ty, // vaddr(VGPR) - llvm_v32i8_ty, // rsrc(SGPR) - llvm_v16i8_ty, // sampler(SGPR) + llvm_v8i32_ty, // rsrc(SGPR) + llvm_v4i32_ty, // sampler(SGPR) llvm_i32_ty, // dmask(imm) llvm_i32_ty, // unorm(imm) llvm_i32_ty, // r128(imm) @@ -74,7 +74,7 @@ let TargetPrefix = "SI", isTarget = 1 in { class Image : Intrinsic < [llvm_v4f32_ty], // vdata(VGPR) [llvm_anyint_ty, // vaddr(VGPR) - llvm_v32i8_ty, // rsrc(SGPR) + llvm_v8i32_ty, // rsrc(SGPR) llvm_i32_ty, // dmask(imm) llvm_i32_ty, // unorm(imm) llvm_i32_ty, // r128(imm) |
